topic Re: QorIQ GPIO Input Buffer Enable register support in P-Series

QorIQ GPIO Input Buffer Enable register support

robwestfall — Thu, 31 Mar 2016 18:24:11 GMT

In the Rev1 version of the T1040 Reference manual, the GPIO block got a new register - The "GPIO Input Buffer Enable Register (GPIOx_GPIBE)". This was not in the older RevE manual. The manual says this:

The GPIO Input Buffer Enable register is used to control the input enable of each

individual GPIO port. When an individual GPIO port’s direction is set to input

(GPIO_GPDIR[DRn=0]), the associated input enable must be set (GPIOxGPIE[IEn]=1)

to propagate the port value to the GPIO Data Register. When a port’s input enable is

disabled, the port value does not propagate to the GPIO Data Register.

What CPU version was this implemented in? And what happens if I don't set them. The documentation says that a value of zero makes the port disabled, and the reset value for the register is all zero's, meaning all inputs are disabled.

We are building a new CPU board that uses the T1042 cpu, and I'm confused about what happens here. I am working off the T1040RDB, but it doesn't actually use any GPIO so it doesn't help me.

The latest UBoot software does not have this register in their register mapping headers.

Thanks,

Rob Westfall

Xerox Corporation

Re: QorIQ GPIO Input Buffer Enable register support

ufedor — Fri, 01 Apr 2016 11:19:14 GMT

This is a documentation issue.

The section "22.4.7 GPIO Input Buffer Enable Register (GPIOx_GPIBE)" has to be discarded.

Re: QorIQ GPIO Input Buffer Enable register support

robwestfall — Wed, 06 Apr 2016 19:49:35 GMT

Is there an ERRATA doc for the QorIQ T1040 Reference Manual?

Re: QorIQ GPIO Input Buffer Enable register support

ufedor — Thu, 07 Apr 2016 01:45:05 GMT

This is a document generation issue which will be fixed in the next RM revision.

Re: QorIQ GPIO Input Buffer Enable register support

robwestfall — Thu, 07 Apr 2016 19:09:24 GMT

Any idea when the new version will be released?