https://community.nxp.com/t5/P-Series/P4080DS-ELBC-ORg0-Register/m-p/465092#M2725 <HTML><HEAD></HEAD><BODY><P>&gt; How I can set 24-27 bits to 0000 such that the board can boot?</P><P>This is impossible because the GPCM read operation shoud implement a delay to wait for the NOR Flash data.</P><P>Please refer to the NOR Flash Data Sheet and P4080 QorIQ Multicore Communication Processor Reference Manual, 13.4.2.1 GPCM read signal timing.</P></BODY></HTML> Wed, 01 Jun 2016 07:58:12 GMT ufedor 2016-06-01T07:58:12Z https://community.nxp.com/t5/P-Series/P4080DS-ELBC-ORg0-Register/m-p/465091#M2724 <HTML><HEAD></HEAD><BODY><P>Hi,<BR />I have p4080ds board and two question about it. First one, Is there any relationship between 24-27 bits SCY and 29-30 bits TRLX-ETHR&nbsp; in&nbsp; ELBC_ORg0 register? I think these are related to NOR FLASH read acces time. Second when I set 24-27 bits to 1011 the board does not boot. When I set 24-27 bits to 1100 the board does boot. What is the reason for that?&nbsp; How I can set 24-27 bits to 0000 such that the board can boot?</P><P>Best regards.</P></BODY></HTML> Wed, 01 Jun 2016 07:35:41 GMT https://community.nxp.com/t5/P-Series/P4080DS-ELBC-ORg0-Register/m-p/465091#M2724 yyurtcan 2016-06-01T07:35:41Z https://community.nxp.com/t5/P-Series/P4080DS-ELBC-ORg0-Register/m-p/465092#M2725 <HTML><HEAD></HEAD><BODY><P>&gt; How I can set 24-27 bits to 0000 such that the board can boot?</P><P>This is impossible because the GPCM read operation shoud implement a delay to wait for the NOR Flash data.</P><P>Please refer to the NOR Flash Data Sheet and P4080 QorIQ Multicore Communication Processor Reference Manual, 13.4.2.1 GPCM read signal timing.</P></BODY></HTML> Wed, 01 Jun 2016 07:58:12 GMT https://community.nxp.com/t5/P-Series/P4080DS-ELBC-ORg0-Register/m-p/465092#M2725 ufedor 2016-06-01T07:58:12Z