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    <title>topic Queries regarding P1013 Microprocessor in P-Series</title>
    <link>https://community.nxp.com/t5/P-Series/Queries-regarding-P1013-Microprocessor/m-p/403262#M2256</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In one of our project we are using P1013 Microprocessor for Ethernet Module. My question is:-&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt; font-family: 'Calibri','sans-serif'; color: #1f497d;"&gt;if I connect 8 port switch IC#1 on RGMII#1 and 8 port Switch IC#2 on RGMII#2/PCIe then all 16 ports are able to exchange data?.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt; font-family: 'Calibri','sans-serif'; color: #1f497d;"&gt;Please find the attached block diagram for easier understanding.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt; font-family: 'Calibri','sans-serif'; color: #1f497d;"&gt;Please revert back asap. &lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 23 Sep 2015 05:50:43 GMT</pubDate>
    <dc:creator>lokeshe</dc:creator>
    <dc:date>2015-09-23T05:50:43Z</dc:date>
    <item>
      <title>Queries regarding P1013 Microprocessor</title>
      <link>https://community.nxp.com/t5/P-Series/Queries-regarding-P1013-Microprocessor/m-p/403262#M2256</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In one of our project we are using P1013 Microprocessor for Ethernet Module. My question is:-&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt; font-family: 'Calibri','sans-serif'; color: #1f497d;"&gt;if I connect 8 port switch IC#1 on RGMII#1 and 8 port Switch IC#2 on RGMII#2/PCIe then all 16 ports are able to exchange data?.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt; font-family: 'Calibri','sans-serif'; color: #1f497d;"&gt;Please find the attached block diagram for easier understanding.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt; font-family: 'Calibri','sans-serif'; color: #1f497d;"&gt;Please revert back asap. &lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 23 Sep 2015 05:50:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/P-Series/Queries-regarding-P1013-Microprocessor/m-p/403262#M2256</guid>
      <dc:creator>lokeshe</dc:creator>
      <dc:date>2015-09-23T05:50:43Z</dc:date>
    </item>
    <item>
      <title>Re: Queries regarding P1013 Microprocessor</title>
      <link>https://community.nxp.com/t5/P-Series/Queries-regarding-P1013-Microprocessor/m-p/403263#M2257</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;P1013 doesn't provide hardware support for automatic mapping of Ethernet packets between RGMII ports or Ethernet modules on PCIe. This mapping can be implemented by means of software. &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Linux SDK provides reproducibility guides how to perform benchmarking of IPv4 forward, IPSec forward, NAT and Firewall (eTSEC version). These tests applicable to P1022/P1013.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A class="jive-link-external-small" href="http://www.freescale.com/infocenter/index.jsp?topic=%2FQORIQSDK%2F5074421.html" rel="nofollow"&gt;http://www.freescale.com/infocenter/index.jsp?topic=%2FQORIQSDK%2F5074421.html&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Pavel&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 23 Sep 2015 08:07:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/P-Series/Queries-regarding-P1013-Microprocessor/m-p/403263#M2257</guid>
      <dc:creator>LPP</dc:creator>
      <dc:date>2015-09-23T08:07:24Z</dc:date>
    </item>
    <item>
      <title>Re: Queries regarding P1013 Microprocessor</title>
      <link>https://community.nxp.com/t5/P-Series/Queries-regarding-P1013-Microprocessor/m-p/403264#M2258</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks for the information. Can you please confirm whether Mapping can be done between 1 RGMII port and PCIe.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 23 Sep 2015 09:21:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/P-Series/Queries-regarding-P1013-Microprocessor/m-p/403264#M2258</guid>
      <dc:creator>lokeshe</dc:creator>
      <dc:date>2015-09-23T09:21:34Z</dc:date>
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