CECR[RST] bit won't clear.

eng5678 — Fri, 10 Oct 2014 17:47:04 GMT

Is there any reason why the powequicc risc processor wont clear the CECR[FLAG] bit when a command is issued? I have issued a command and am polling on this bit for completion but it never clears. Only a CECR[RST] =1 clears it.

Re: CECR[RST] bit won't clear.

LPP — Mon, 13 Oct 2014 11:56:28 GMT

QE may halt if it's clocks frequencies are out of range. Please check QE PLL and VCO frequency (and also frequencies of serial interfaces) .

QE may halt because of bus error (before init_tx_rx command or as the result of this command). Check SDMA Status register SDSR. If error is set, check SDTA1/SDTA2/SDTM1/SDTM2 registers.

The QE never crashes!

- It can stop completely on SDMA faults. You should always have an error handler for this!

- It works with all data/parameters you give it. Wrong parameters may cause fault!

- MURAM Parameter overlaps cause mostly very interesting effects of highly statistical nature.

- Structure alignment messups are the 2nd most common problem.

Are you sure that QE has been running before a new command was issued? Have you try other QE protocols running (e.g. UART)?

Hint. On bootup with disabled QE:

Set complete MURAM to some “odd” value (not zeroes!), e.g., 0x55 that can easily be identified in broken pointers or missing initializations.

Have a great day,
Pavel

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

Re: CECR[RST] bit won't clear.

eng5678 — Thu, 13 Nov 2014 20:41:29 GMT

The root problem for this question was corrected by loading microcode into the quicc engine. Our experience has been primarily with Powerquicc 2 CPMs (MPC82XX) which have the microcode preloaded.

topic CECR[RST] bit won't clear. in P-Series

CECR[RST] bit won't clear.

Re: CECR[RST] bit won't clear.

Re: CECR[RST] bit won't clear.