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    <title>topic Re: ZQ cablibration error in P-Series</title>
    <link>https://community.nxp.com/t5/P-Series/ZQ-cablibration-error/m-p/361048#M1822</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;DDR_ERR_DETECT[24] means Automatic Calibration Error (ACE), I am not sure why you called it "ZQ calibration Error".&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;ACE bit can be set if&lt;/P&gt;&lt;P&gt;1) Automatic CPO calibration was enabled by setting TIMING_CFG_2[CPO] to 11111 and an error was reported.&lt;/P&gt;&lt;P&gt;2) Incorrect termination of MDICx signals.&lt;/P&gt;&lt;P&gt;3) Write leveling calibration was not able to complete. This relates to improper settings of the DDR_WRLVL_CNTL register or board-level issues.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 30 Oct 2014 07:09:55 GMT</pubDate>
    <dc:creator>Bulat</dc:creator>
    <dc:date>2014-10-30T07:09:55Z</dc:date>
    <item>
      <title>ZQ cablibration error</title>
      <link>https://community.nxp.com/t5/P-Series/ZQ-cablibration-error/m-p/361047#M1821</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I used a P1011NEX in my design,and I found a ZQ calibration Error(DDR_ERR_DETECT[24]) when initializing DDR3,Which problems would trigger this error?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 29 Oct 2014 09:06:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/P-Series/ZQ-cablibration-error/m-p/361047#M1821</guid>
      <dc:creator>rayxie</dc:creator>
      <dc:date>2014-10-29T09:06:35Z</dc:date>
    </item>
    <item>
      <title>Re: ZQ cablibration error</title>
      <link>https://community.nxp.com/t5/P-Series/ZQ-cablibration-error/m-p/361048#M1822</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;DDR_ERR_DETECT[24] means Automatic Calibration Error (ACE), I am not sure why you called it "ZQ calibration Error".&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;ACE bit can be set if&lt;/P&gt;&lt;P&gt;1) Automatic CPO calibration was enabled by setting TIMING_CFG_2[CPO] to 11111 and an error was reported.&lt;/P&gt;&lt;P&gt;2) Incorrect termination of MDICx signals.&lt;/P&gt;&lt;P&gt;3) Write leveling calibration was not able to complete. This relates to improper settings of the DDR_WRLVL_CNTL register or board-level issues.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 30 Oct 2014 07:09:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/P-Series/ZQ-cablibration-error/m-p/361048#M1822</guid>
      <dc:creator>Bulat</dc:creator>
      <dc:date>2014-10-30T07:09:55Z</dc:date>
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