P-SeriesのトピックRe: P1021 Management Bus Issue

P1021 Management Bus Issue

brahmamyelagatu — Tue, 03 Feb 2015 15:58:46 GMT

Hi,

We've interfaced two Mavell PHY's (88E1112) in P1021 Customized board using MDIO,MDC bus .

We're able to Addressed the PHY's using eTSEC1 MDIO memory-mapped registers. But we're unable to Addressed using eTSEC2 MDIO memory-mapped registers.

Can anyone explain how to address(read and write cycles) the PHY using eTSEC2 MDIO memory-mapped registers.

Regards,

Brahmam.

Re: P1021 Management Bus Issue

Bulat — Wed, 04 Feb 2015 12:16:24 GMT

If I understand you correctly, you are going to configure an external PHY via MDC, MDIO bus. In that case you have to use eTSEC1 MDIO memory-mapped registers, even if the PHY is connected to eTSEC2 or eTSEC3. This is because MDC and MDIO signals are TSEC1 controlled. Make sure that PHYs connected to the MDIO bus have different bus Addresses.

eTSEC2 MDIO memory-mapped registers should only be used to configure internal TBI PHY, in a way described in section 15.10.1.4 of the Ref Manual.

Re: P1021 Management Bus Issue

brahmamyelagatu — Wed, 04 Feb 2015 13:18:12 GMT

Hi Karymov,

Thanks for your info

Regards,

Brahmam