topic Re: PCIe EDAC errors on P4080 ? in P-Series

PCIe EDAC errors on P4080 ?

stevereynolds — Wed, 23 Jul 2014 11:25:44 GMT

On our P4080 board using SDK 1.5 I see these errors at boot but then everything seems to work OK. There are reports of this on various forums but I cannot see a fix

Does anyone else see these ? See the line which says PCIE Error(s) detected

Thanks

Steve

Found FSL PCI host bridge at 0x0000000ffe200000. Firmware bus number: 0->11

PCI host bridge /pcie@ffe200000 (primary) ranges:

MEM 0x0000000800000000..0x000000083fffffff -> 0x0000000080000000

IO 0x0000000ffca00000..0x0000000ffcafffff -> 0x0000000000000000

/pcie@ffe200000: PCICSRBAR @ 0xff000000

/pcie@ffe200000: Setup 64-bit PCI DMA window

/pcie@ffe200000: WARNING: Outbound window cfg leaves gaps in memory map. Adjusting the memory map could reduce unnecessary bounce buffering.

/pcie@ffe200000: DMA window size is 0x80000000

EDAC PCI0: Giving out device to module 'MPC85xx_edac' controller 'mpc85xx_pci_err': DEV 'ffe200000.pcie' (INTERRUPT)

MPC85xx_edac acquired irq 482 for PCI Err

MPC85xx_edac PCI err registered

Found FSL PCI host bridge at 0x0000000ffe201000. Firmware bus number: 0->2

PCI host bridge /pcie@ffe201000 ranges:

MEM 0x0000000c00000000..0x0000000c1fffffff -> 0x00000000c0000000

IO 0x0000000ffcb00000..0x0000000ffcbfffff -> 0x0000000000000000

/pcie@ffe201000: PCICSRBAR @ 0xff000000

/pcie@ffe201000: Setup 64-bit PCI DMA window

/pcie@ffe201000: WARNING: Outbound window cfg leaves gaps in memory map. Adjusting the memory map could reduce unnecessary bounce buffering.

/pcie@ffe201000: DMA window size is 0xc0000000

EDAC PCI1: Giving out device to module 'MPC85xx_edac' controller 'mpc85xx_pci_err': DEV 'ffe201000.pcie' (INTERRUPT)

MPC85xx_edac acquired irq 481 for PCI Err

MPC85xx_edac PCI err registered

software IO TLB [mem 0x0311b000-0x0711b000] (64MB) mapped at [c311b000-c711afff]

PCI: Probing PCI hardware

fsl-pci ffe200000.pcie: PCI host bridge to bus 0000:00

pci_bus 0000:00: root bus resource [io 0x0000-0xfffff]

pci_bus 0000:00: root bus resource [mem 0x800000000-0x83fffffff] (bus address [0x80000000-0xbfffffff])

pci_bus 0000:00: root bus resource [bus 00-ff]

PCIE error(s) detected

PCIE ERR_DR register: 0x00020000

PCIE ERR_CAP_STAT register: 0x80000001

PCIE ERR_CAP_R0 register: 0x00000800

PCIE ERR_CAP_R1 register: 0x00000000

PCIE ERR_CAP_R2 register: 0x00000000

PCIE ERR_CAP_R3 register: 0x00000000

PCIE error(s) detected

PCIE ERR_DR register: 0x00020000

PCIE ERR_CAP_STAT register: 0x80000001

PCIE ERR_CAP_R0 register: 0x00000800

PCIE ERR_CAP_R1 register: 0x00000000

PCIE ERR_CAP_R2 register: 0x00000000

PCIE ERR_CAP_R3 register: 0x00000000

PCIE error(s) detected

PCIE ERR_DR register: 0x00020000

PCIE ERR_CAP_STAT register: 0x80000001

PCIE ERR_CAP_R0 register: 0x00000800

PCIE ERR_CAP_R1 register: 0x00000000

PCIE ERR_CAP_R2 register: 0x00000000

PCIE ERR_CAP_R3 register: 0x00000000

PCIE error(s) detected

Re: PCIe EDAC errors on P4080 ?

yipingwang — Thu, 24 Jul 2014 07:58:22 GMT

Hello Steve,

This is hint information not error message, actually this has already been addressed in the SDK 1.6 document.

If EDAC Kernel module is loaded, there is Kernel boot message as the following.

........

EDAC MC: Ver: 2.1.0

EDAC MC0: Giving out device to 'MPC85xx_edac' 'mpc85xx_mc_err': DEV mpc85xx_mc_err

MPC85xx_edac acquired irq 16 for MC

MPC85xx_edac MC err registered

EDAC MC1: Giving out device to 'MPC85xx_edac' 'mpc85xx_mc_err': DEV mpc85xx_mc_err

MPC85xx_edac acquired irq 16 for MC

MPC85xx_edac MC err registered

EDAC PCI0: Giving out device to module 'MPC85xx_edac' controller 'mpc85xx_pci_err': DEV

'ffe200000.pcie' (INTERRUPT)

MPC85xx_edac acquired irq 16 for PCI Err

MPC85xx_edac PCI err registered

EDAC PCI1: Giving out device to module 'MPC85xx_edac' controller 'mpc85xx_pci_err': DEV

'ffe201000.pcie' (INTERRUPT)

MPC85xx_edac acquired irq 16 for PCI Err

MPC85xx_edac PCI err registered

EDAC PCI2: Giving out device to module 'MPC85xx_edac' controller 'mpc85xx_pci_err': DEV

'ffe202000.pcie' (INTERRUPT)

MPC85xx_edac acquired irq 16 for PCI Err

MPC85xx_edac PCI err registered

Testing edac driver is start.

PCIE error(s) detected

PCIE ERR_DR register: 0x00020000

PCIE ERR_CAP_STAT register: 0x80000001

PCIE ERR_CAP_R0 register: 0x00000800

PCIE ERR_CAP_R1 register: 0x00000000

PCIE ERR_CAP_R2 register: 0x00000000

Chapter 8 Linux Kernel Drivers

Freescale Linux SDK v1.6,

PCIE ERR_CAP_R3 register: 0x00000000

........

p4080 login: root

Password:

[root@p4080 root]#

Have a great day,
Yiping

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Re: PCIe EDAC errors on P4080 ?

stevereynolds — Thu, 24 Jul 2014 09:39:51 GMT

OK Thanks for answering, but it looks from your reply as if on 1.6 the error is only printed once as a test, but I see it over and over?

Is the 1.6 code different in this area or is just the documentation different?

Should I move to 1.6 more quickly than I had intended to? or should I ignore these errors ?

Thanks again

Steve

Re: PCIe EDAC errors on P4080 ?

yipingwang — Thu, 24 Jul 2014 11:01:18 GMT

Hello Steve,

I think you could ignore these messages, it will appear in Kernel boot log, if EDAC is enabled.

CONFIG_EDAC_MM_EDAC

CONFIG_EDAC_MPC85XX

These options are enabled in the default Kernel config file, please refer to the following log which I captured with SDK 1.6 pre-built images.

Found FSL PCI host bridge at 0x0000000ffe200000. Firmware bus number: 0->0

PCI host bridge /pcie@ffe200000 ranges:

MEM 0x0000000c00000000..0x0000000c1fffffff -> 0x00000000e0000000

IO 0x0000000ff8000000..0x0000000ff800ffff -> 0x0000000000000000

/pcie@ffe200000: PCICSRBAR @ 0xdf000000

EDAC PCI0: Giving out device to module 'MPC85xx_edac' controller 'mpc85xx_pci_err': DEV 'ffe200000.pcie' (INTERRUPT)

MPC85xx_edac acquired irq 482 for PCI Err

MPC85xx_edac PCI err registered

Found FSL PCI host bridge at 0x0000000ffe202000. Firmware bus number: 0->1

PCI host bridge /pcie@ffe202000 ranges:

MEM 0x0000000c40000000..0x0000000c5fffffff -> 0x00000000e0000000

IO 0x0000000ff8020000..0x0000000ff802ffff -> 0x0000000000000000

/pcie@ffe202000: PCICSRBAR @ 0xdf000000

EDAC PCI1: Giving out device to module 'MPC85xx_edac' controller 'mpc85xx_pci_err': DEV 'ffe202000.pcie' (INTERRUPT)

MPC85xx_edac acquired irq 480 for PCI Err

MPC85xx_edac PCI err registered

PCI: Probing PCI hardware

fsl-pci ffe200000.pcie: PCI host bridge to bus 0000:00

pci_bus 0000:00: root bus resource [io 0xf1040000-0xf104ffff] (bus address [0x0000-0xffff])

pci_bus 0000:00: root bus resource [mem 0xc00000000-0xc1fffffff] (bus address [0xe0000000-0xffffffff])

pci_bus 0000:00: root bus resource [bus 00-ff]

pci 0000:00:00.0: ignoring class 0x0b2000 (doesn't match header type 01)

pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring

pci 0000:00:00.0: PCI bridge to [bus 01-ff]

fsl-pci ffe202000.pcie: PCI host bridge to bus 0001:02

pci_bus 0001:02: root bus resource [io 0xf1060000-0xf106ffff] (bus address [0x0000-0xffff])

pci_bus 0001:02: root bus resource [mem 0xc40000000-0xc5fffffff] (bus address [0xe0000000-0xffffffff])

pci_bus 0001:02: root bus resource [bus 02-ff]

pci 0001:02:00.0: ignoring class 0x0b2000 (doesn't match header type 01)

pci 0001:02:00.0: Primary bus is hard wired to 0

pci 0001:02:00.0: bridge configuration invalid ([bus 01-01]), reconfiguring

pci 0001:02:00.0: PCI bridge to [bus 03-ff]

pci 0000:00:00.0: PCI bridge to [bus 01]

pci 0000:00:00.0: bridge window [io 0xf1040000-0xf104ffff]

pci 0000:00:00.0: bridge window [mem 0xc00000000-0xc1fffffff]

pci 0001:02:00.0: BAR 9: can't assign mem pref (size 0x100000)

pci 0001:03:00.0: BAR 6: assigned [mem 0xc40080000-0xc400fffff pref]

pci 0001:02:00.0: PCI bridge to [bus 03]

pci 0001:02:00.0: bridge window [io 0xf1060000-0xf106ffff]

pci 0001:02:00.0: bridge window [mem 0xc40000000-0xc5fffffff]

pci_bus 0001:02: Some PCI device resources are unassigned, try booting with pci=realloc

bio: create slab <bio-0> at 0

vgaarb: loaded

SCSI subsystem initialized

usbcore: registered new interface driver usbfs

usbcore: registered new interface driver hub

usbcore: registered new device driver usb

pps_core: LinuxPPS API ver. 1 registered

PTP clock support registered

EDAC MC: Ver: 3.0.0

Have a great day,
Yiping

Re: PCIe EDAC errors on P4080 ?

lunminliang — Fri, 25 Jul 2014 09:20:55 GMT

This looks like PCI is scanning the bus.

As PCIE ERR_DR register: 0x00020000 it's Invalid CONFIG_ADDR/PEX_CONFIG_DATA access

PCIE ERR_CAP_STAT register: 0x80000001 also shows Transaction originated from PEX_CONFIG_ADDR/PEX_CONFIG_DATA

PCIE ERR_CAP_R0 register: 0x00000800 it's PCI Express type 2, format 0