topic Re: PCIE error PEX_ERR_DR[CRST] in P-Series

PCIE error PEX_ERR_DR[CRST]

t_alex — Mon, 16 Jun 2014 05:11:53 GMT

We configured our custom P3041 board as root complex mode, and connect via PCB to another PCIe device.

From u-boot, when we do enumeration, we can see another bus appear (bus 1).

Trying to read from configuration space of the other device will result in 0xffffffff no matter which address.

And error PEX_ERR_DR[CRST] is detected.

What should I do to know more about the error details to troubleshoot the problem?

Re: PCIE error PEX_ERR_DR[CRST]

lunminliang — Tue, 17 Jun 2014 08:16:37 GMT

Quote from the chip reference manual:

The controller always retries the transaction as soon as possible until a status other than CRS is returned. However, if a CRS status is returned after the configuration retry timeout(PEXCONF_RTY_TOR) timer expires, then the controller aborts the transaction and sends all 1s (0xFFFF_FFFF) data back to requester.

So I think you need to determine that something is wrong with the target of the request

Re: PCIE error PEX_ERR_DR[CRST]

t_alex — Tue, 17 Jun 2014 08:48:08 GMT

The value of LTSSM State Status Register is 0x16 (state L0) which means link training is successful.

Does it mean that communication with the target is fine ?

So it seems when we start configuration space access then the target does not reply.

Re: PCIE error PEX_ERR_DR[CRST]

lunminliang — Fri, 20 Jun 2014 07:35:21 GMT

From the specification, "L0 is the normal operational state where data and control packets can be transmitted and received. All power management states are entered from this state."

I am not expert on PCIE, IMHO, this indicates the physical commnication is fine. Your request target (EP) should has problem. You may send your complete U-boot log to look into.