P-Series中的主题 Re: [p1014] Config eTSEC2 to SGMII

[p1014] Config eTSEC2 to SGMII

tianyigs — Fri, 25 Apr 2014 07:38:35 GMT

Hi,

I'm very new to fs devices. This time I'm working on p1040. I need to config the eTSEC2 port to SGMII mode in order to connect a switch chip. The only ref I have is the p1010rdb code in linux 3.12 kernel. I have no idea where to start. From the p1040RM, it seems come configs (eg. GUTS_PORDEVSR1 GUTS_DEVDISR1...) are needed, but I don't konw how to form such config in code. Could any one help me to start?

Thanks

Re: [p1014] Config eTSEC2 to SGMII

yipingwang — Wed, 30 Apr 2014 09:09:37 GMT

First for SGMII design, there is an application note AN3869.pdf, probably it is useful for you.

About the software, you could download and install SDK 1.5 from Freescale Website, and the images built for P1010 should be compatible with P1014, according p1010rdb dts file, you could see eTSEC2 for P1010RDB is configured as SGMII with external phy, what's about your design? Use serdes instead of external phy?

P1010RDB eTSEC2 is set to operate in SGMII and is directly connected to the Vitesse SGMII PHY VSC8221

Have a great day,
Yiping Wang

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Re: [p1014] Config eTSEC2 to SGMII

tianyigs — Wed, 30 Apr 2014 09:17:58 GMT

Hi Yiping,

Thanks for your reply. We have checked the p1010rdb and its reference code. As you mentioned, eTSEC2 in p1010rdb is connected to external phy. We would like to connect it to a switch via serdes. Will that be different in the dts

Regards,

Re: [p1014] Config eTSEC2 to SGMII

tianyigs — Wed, 30 Apr 2014 14:48:24 GMT

and here is a thread I found: Device Tree (.dts) configuration for eTSEC2 in SGMII/Serdes mode

I followed those steps, but dmesg says:

[ 37.452178] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready

[ 37.458615] libphy: PHY fixed-0:01 not found

[ 37.462916] net eth1: could not attach to PHY

[ 39.454844] libphy: mdio@ffe24000:00 - Link is Up - 1000/Full

[ 39.460762] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready

Re: [p1014] Config eTSEC2 to SGMII

yipingwang — Mon, 05 May 2014 05:27:48 GMT

There is an option to establish a zero-PHY link, which is declared in the device tree as "fixed-link" property in added in the MAC node, please refer to Documentation/devicetree/bindings/net/fsl-tsec-phy.txt. Have you added this property in device tree? Would you please share your dts file?

Re: [p1014] Config eTSEC2 to SGMII

tianyigs — Mon, 05 May 2014 11:07:03 GMT

We have tried this. When we checked MII_BMSR register of tbiphy, the link was not up. We think the problem comes from the other side: QCA AR8327N switch. Do you have any suggestions in config the serdes of that switch? We tried several according to its datasheet, but it dose not work.

Re: [p1014] Config eTSEC2 to SGMII

yipingwang — Thu, 08 May 2014 07:03:12 GMT

Please note the serdes doesn't have the function of PHY, please refer to the application note AN3869, in order to work with the SGMII interface, the link partner should support either auto-negotiation type SGMII PHY side, or IEEE802.3 Clause 37 peer auto-negotiation.

Re: [p1014] Config eTSEC2 to SGMII

tianyigs — Fri, 09 May 2014 00:45:39 GMT

Thanks a lot, we will try it.