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    <title>topic PCA9546A I2C MUX Bus Problem in Other NXP Products</title>
    <link>https://community.nxp.com/t5/Other-NXP-Products/PCA9546A-I2C-MUX-Bus-Problem/m-p/1041151#M8808</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I designed this into a new product or ours.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I notice that the chip frequently results in an I2C bus stuck event that needs recovery.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;This occurs when writing the control register for a MUX selection, followed immediately bu a read to confirm the correct selection.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The bus will sometimes become stuck in that SDA remains low forever or until bus recovery procedure.&lt;/P&gt;&lt;P&gt;The bus become stuck at around bit 8 or Ack of read data address. See attached wave capture.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;This happens at a frequency of around 1 in 1000 or in my case about every 3 minutes.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Bus operation is 100kHz.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;What can cause this problem?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The bus signals are clear and beautiful. Is there a minimum time specification between a write followed by read ?&lt;/P&gt;&lt;P&gt;I cannot see it in the datasheet.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;Bernt&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 29 Jul 2020 22:33:13 GMT</pubDate>
    <dc:creator>berntau</dc:creator>
    <dc:date>2020-07-29T22:33:13Z</dc:date>
    <item>
      <title>PCA9546A I2C MUX Bus Problem</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/PCA9546A-I2C-MUX-Bus-Problem/m-p/1041151#M8808</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I designed this into a new product or ours.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I notice that the chip frequently results in an I2C bus stuck event that needs recovery.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;This occurs when writing the control register for a MUX selection, followed immediately bu a read to confirm the correct selection.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The bus will sometimes become stuck in that SDA remains low forever or until bus recovery procedure.&lt;/P&gt;&lt;P&gt;The bus become stuck at around bit 8 or Ack of read data address. See attached wave capture.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;This happens at a frequency of around 1 in 1000 or in my case about every 3 minutes.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Bus operation is 100kHz.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;What can cause this problem?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The bus signals are clear and beautiful. Is there a minimum time specification between a write followed by read ?&lt;/P&gt;&lt;P&gt;I cannot see it in the datasheet.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;Bernt&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 29 Jul 2020 22:33:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/PCA9546A-I2C-MUX-Bus-Problem/m-p/1041151#M8808</guid>
      <dc:creator>berntau</dc:creator>
      <dc:date>2020-07-29T22:33:13Z</dc:date>
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