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    <title>topic Re: MPC8349 RCWLR Configuration in Other NXP Products</title>
    <link>https://community.nxp.com/t5/Other-NXP-Products/MPC8349-RCWLR-Configuration/m-p/990001#M8302</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&amp;gt;&amp;nbsp;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;According to datasheet, bits 9-15 means core PLL configuration,&lt;/SPAN&gt;&lt;/P&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&amp;gt; it refers to MSC7120 Hardware Specifications.&lt;/SPAN&gt;&lt;/P&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Which exactly NXP document is in question?&lt;/SPAN&gt;&lt;/P&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;What is the exact position in the document?&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 31 Oct 2019 16:23:36 GMT</pubDate>
    <dc:creator>ufedor</dc:creator>
    <dc:date>2019-10-31T16:23:36Z</dc:date>
    <item>
      <title>MPC8349 RCWLR Configuration</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/MPC8349-RCWLR-Configuration/m-p/990000#M8301</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;P&gt;I try to understand RCWLR register for MPC8349EA PowerQUICC II Pro Integrated Host Processor.&lt;/P&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;P&gt;According to datasheet, bits 9-15 means core PLL configuration, it refers to MSC7120 Hardware Specifications. But i can't find this document and there is no other information. Does everyone can help me please ?&lt;/P&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;P&gt;&lt;/P&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;P&gt;For information in attachment the clock subsystem wished.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 31 Oct 2019 09:30:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/MPC8349-RCWLR-Configuration/m-p/990000#M8301</guid>
      <dc:creator>dorian_chambon</dc:creator>
      <dc:date>2019-10-31T09:30:28Z</dc:date>
    </item>
    <item>
      <title>Re: MPC8349 RCWLR Configuration</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/MPC8349-RCWLR-Configuration/m-p/990001#M8302</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&amp;gt;&amp;nbsp;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;According to datasheet, bits 9-15 means core PLL configuration,&lt;/SPAN&gt;&lt;/P&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&amp;gt; it refers to MSC7120 Hardware Specifications.&lt;/SPAN&gt;&lt;/P&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Which exactly NXP document is in question?&lt;/SPAN&gt;&lt;/P&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;What is the exact position in the document?&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 31 Oct 2019 16:23:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/MPC8349-RCWLR-Configuration/m-p/990001#M8302</guid>
      <dc:creator>ufedor</dc:creator>
      <dc:date>2019-10-31T16:23:36Z</dc:date>
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