mx31 SPI breaks between commands

TheRealJayJay — Thu, 29 Oct 2020 09:01:19 GMT

Hello,

im writing a (kernel) SPI drivers for a camerasensor. I used the pmic drivers in the LTIB to base mine.

The problem is now, that between SPI transfers (in one single spi_messages) there are breaks of ca. 6 - 7us. Thats very much when sending with 16 Mhz.
The spi send function is:

Code:

static inline int lupa_spi_test1(struct spi_device *spi, unsigned int *buf,         unsigned int *buf1){ struct spi_transfer t = {  .tx_buf = buf,  .rx_buf = buf,  .len = 1,  .cs_change = 0,  .delay_usecs = 0, }; struct spi_transfer t1 = {  .tx_buf = buf1,  .rx_buf = buf1,  .len = 1,  .cs_change = 0,  .delay_usecs = 0, }; struct spi_message m;  spi_message_init(&m); spi_message_add_tail(&t, &m); spi_message_add_tail(&t1, &m); if (spi_sync(spi, &m) != 0 || m.status != 0)  return -1; return (2 - m.actual_length);}

To call this function is use this code:

Code:

 int i; unsigned int val = 0xFFFF; unsigned int val1 = 0xFFFF; for (i = 0; i < 10; i++) {  if (lupa_spi_test1(spi, &val, &val1) != 0)   printk(KERN_INFO "SPI send ERROR"); }

The SPI breaks between the function calls (betweend the spi_messages) are 17 - 18us.

Sending with spi_async instead of spi_sync could only help to reduce the breaks between the function calls but not the break between the two spi_transfers in one spi_message.

The break between the first spi_transfers (one spi_messages) are sometimes even up to 85us.

There dont run any programs which use much cpu. Every process uses 0.0 CPU in the "top" task manager.

Somebody knows where the breaks come from? And how to reduce them?

Thanks and Regards,
Jascha

Re: mx31 SPI breaks between commands

physicseng — Wed, 04 Jun 2008 02:54:29 GMT

If you haven't, read the docs on the CSPI controller (Chapter-24) in the iMX31 Reference Manual. This is a 'configurable' SPI controller and there are numerous control bits and a 'Sample Period Control Reg' which could be the problem. The Sample Period Control-reg is a way to insert delays between consecutive SPI transfers.
-Mark

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mx31 SPI breaks between commands

Re: mx31 SPI breaks between commands