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    <title>topic Re: SC16IS762 FIFO operation in Other NXP Products</title>
    <link>https://community.nxp.com/t5/Other-NXP-Products/SC16IS762-FIFO-operation/m-p/828023#M6395</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks for looking. I think that I have found the problem. I was flushing the Rx and Tx FIFOs by setting bits 1 or 2 in the FCR and not resetting bit 0 which stopped the FIFOs.&lt;/P&gt;&lt;P&gt;dan&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 18 Sep 2018 07:27:02 GMT</pubDate>
    <dc:creator>dansmithers</dc:creator>
    <dc:date>2018-09-18T07:27:02Z</dc:date>
    <item>
      <title>SC16IS762 FIFO operation</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/SC16IS762-FIFO-operation/m-p/828022#M6394</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I am trying to set up the SC16IS762 dual UART in a polled mode and I am expecting to be able to read several bytes from the receiver FIFO.&lt;/P&gt;&lt;P&gt;There is no flow control set up and RTSA, RTSB, CTSA and CTSB are not connected.&lt;/P&gt;&lt;P&gt;I am able to send several bytes using the Tx FIFO, but cannot get the Rx FIFO to accept more than one character.&lt;/P&gt;&lt;P&gt;I am using SPI to communicate with the device.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;First, I initialise the device&lt;/P&gt;&lt;PRE&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; #define &lt;SPAN style="color: #0000c0; font-size: small;"&gt;&lt;EM&gt;E_SC16IS762_CHAN_SEL_A&lt;/EM&gt;&lt;/SPAN&gt; 0
&amp;nbsp;&amp;nbsp;&amp;nbsp; #define &lt;SPAN style="color: #0000c0; font-size: small;"&gt;&lt;EM&gt;E_SC16IS762_CHAN_SEL_B 1
&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/EM&gt;&lt;/SPAN&gt;DeviceInit()
&amp;nbsp;&amp;nbsp;&amp;nbsp; {
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Clear contents of transmit and receive FIFOs, resets FIFO level logic and enables transmit and receive FIFOs&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: small;"&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; SC16IS762_SPI_WriteByte (&lt;/SPAN&gt;&lt;EM style=": ; color: #0000c0; font-size: small;"&gt;E_SC16IS762_CHAN_SEL_A&lt;/EM&gt;&lt;SPAN style="font-size: small;"&gt;, &lt;/SPAN&gt;&lt;EM style=": ; color: #0000c0; font-size: small;"&gt;FCR&lt;/EM&gt;&lt;SPAN style="font-size: small;"&gt;, 0x07);&lt;SPAN style="font-size: small;"&gt; &lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: small;"&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; SC16IS762_SPI_WriteByte (&lt;/SPAN&gt;&lt;EM style=": ; color: #0000c0; font-size: small;"&gt;E_SC16IS762_CHAN_SEL_B&lt;/EM&gt;&lt;SPAN style="font-size: small;"&gt;, &lt;/SPAN&gt;&lt;EM style=": ; color: #0000c0; font-size: small;"&gt;FCR&lt;/EM&gt;&lt;SPAN style="font-size: small;"&gt;, 0x07);&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: small;"&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN style="color: #3f7f5f; font-size: small;"&gt;// Disable interrupts on FIFO levels as we want to poll&lt;/SPAN&gt;&lt;/P&gt;&lt;SPAN style="color: #3f7f5f; font-size: small;"&gt; &lt;SPAN style="font-size: small;"&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; SC16IS762_SPI_WriteByte (&lt;/SPAN&gt;&lt;EM style=": ; color: #0000c0; font-size: small;"&gt;E_SC16IS762_CHAN_SEL_A&lt;/EM&gt;&lt;SPAN style="font-size: small;"&gt;, &lt;/SPAN&gt;&lt;EM style=": ; color: #0000c0; font-size: small;"&gt;IER&lt;/EM&gt;&lt;SPAN style="font-size: small;"&gt;, 0x00);&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;SPAN style="font-size: small;"&gt; &lt;SPAN style="font-size: small;"&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; SC16IS762_SPI_WriteByte (&lt;/SPAN&gt;&lt;EM style=": ; color: #0000c0; font-size: small;"&gt;E_SC16IS762_CHAN_SEL_B&lt;/EM&gt;&lt;SPAN style="font-size: small;"&gt;, &lt;/SPAN&gt;&lt;EM style=": ; color: #0000c0; font-size: small;"&gt;IER&lt;/EM&gt;&lt;SPAN style="font-size: small;"&gt;, 0x00);&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: small;"&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN style="color: #3f7f5f; font-size: small;"&gt;// Set GPIO lines to output&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: small;"&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; SC16IS762_SPI_WriteByte (&lt;/SPAN&gt;&lt;SPAN style="font-size: small;"&gt;&lt;EM style="text-decoration: underline;"&gt;E_SC16IS762_CHAN_SEL_A&lt;/EM&gt;, &lt;/SPAN&gt;&lt;EM style=": ; color: #0000c0; font-size: small;"&gt;IODir&lt;/EM&gt;&lt;SPAN style="font-size: small;"&gt;, 0xFF); &lt;/SPAN&gt;&lt;SPAN style="color: #3f7f5f; font-size: small;"&gt;// all o/p&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #3f7f5f; font-size: small;"&gt;&lt;SPAN style="color: #3f7f5f; font-size: small;"&gt;&lt;SPAN style="font-size: small;"&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; SC16IS762_SPI_WriteByte (E&lt;/SPAN&gt;&lt;EM style=": ; color: #0000c0; font-size: small;"&gt;_SC16IS762_CHAN_SEL_A&lt;/EM&gt;&lt;SPAN style="font-size: small;"&gt;, &lt;/SPAN&gt;&lt;EM style=": ; color: #0000c0; font-size: small;"&gt;IOState&lt;/EM&gt;&lt;SPAN style="font-size: small;"&gt;, 0x00); &lt;/SPAN&gt;&lt;SPAN style="color: #3f7f5f; font-size: small;"&gt;// all 0&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;SPAN style="color: #3f7f5f; font-size: small;"&gt; &lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: small;"&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN style="color: #3f7f5f; font-size: small;"&gt;// disable interrupts on GPIO state change&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: small;"&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; SC16IS762_SPI_WriteByte (&lt;/SPAN&gt;&lt;EM style=": ; color: #0000c0; font-size: small;"&gt;E_SC16IS762_CHAN_SEL_A&lt;/EM&gt;&lt;SPAN style="font-size: small;"&gt;, &lt;/SPAN&gt;&lt;EM style=": ; color: #0000c0; font-size: small;"&gt;IOIntEna&lt;/EM&gt;&lt;SPAN style="font-size: small;"&gt;, 0x00);&lt;/SPAN&gt;&lt;/P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; }&lt;/PRE&gt;&lt;P&gt;and then the two UART channels.&lt;/P&gt;&lt;PRE&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; ChannelInit(channel, baud)
&amp;nbsp;&amp;nbsp;&amp;nbsp; {
&lt;SPAN style="color: #3f7f5f; font-size: small;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // enable FIFO mode and set &lt;SPAN style="text-decoration: underline;"&gt;Rx&lt;/SPAN&gt; trigger to 56&lt;/SPAN&gt;
&lt;P&gt;&lt;SPAN style="font-size: small;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; SC16IS762_SPI_WriteByte (&lt;/SPAN&gt;&lt;SPAN style="color: #0000c0; font-size: small;"&gt;channel&lt;/SPAN&gt;&lt;SPAN style="font-size: small;"&gt;, &lt;/SPAN&gt;&lt;EM style="color: #0000c0; font-size: small;"&gt;FCR&lt;/EM&gt;&lt;SPAN style="font-size: small;"&gt;, 0x81); &lt;/SPAN&gt;&lt;/P&gt;&lt;SPAN style="color: #3f7f5f; font-size: small;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;SPAN style="color: #3f7f5f; font-size: small;"&gt;// Set Extra Features all off&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;P&gt;&lt;SPAN style="font-size: small;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; SC16IS762_SPI_WriteByte (&lt;/SPAN&gt;&lt;SPAN style="color: #0000c0; font-size: small;"&gt;channel&lt;/SPAN&gt;&lt;SPAN style="font-size: small;"&gt;, &lt;/SPAN&gt;&lt;EM style=": ; color: #0000c0; font-size: small;"&gt;EFCR&lt;/EM&gt;&lt;SPAN style="font-size: small;"&gt;, 0x00); &lt;/SPAN&gt;&lt;/P&gt;&lt;SPAN style="color: #3f7f5f; font-size: small;"&gt; &lt;/SPAN&gt;&lt;P&gt;&lt;SPAN style="color: #3f7f5f; font-size: small;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // 0x80 to program baud rate&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: small;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; SC16IS762_SPI_WriteByte (&lt;/SPAN&gt;&lt;SPAN style="color: #0000c0; font-size: small;"&gt;channel&lt;/SPAN&gt;&lt;SPAN style="font-size: small;"&gt;, &lt;/SPAN&gt;&lt;EM style=": ; color: #0000c0; font-size: small;"&gt;LCR&lt;/EM&gt;&lt;SPAN style="font-size: small;"&gt;, 0x80); &lt;/SPAN&gt;&lt;/P&gt;&lt;SPAN style="color: #3f7f5f; font-size: small;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;SPAN style="color: #3f7f5f; font-size: small;"&gt;// divisor LSB&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;P&gt;&lt;SPAN style="font-size: small;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; SC16IS762_SPI_WriteByte (&lt;/SPAN&gt;&lt;SPAN style="color: #0000c0; font-size: small;"&gt;channel&lt;/SPAN&gt;&lt;SPAN style="font-size: small;"&gt;, &lt;/SPAN&gt;&lt;EM style=": ; color: #0000c0; font-size: small;"&gt;DLL&lt;/EM&gt;&lt;SPAN style="font-size: small;"&gt;, (baudRate[rate] &amp;amp; 0xFF));&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: small;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;SPAN style="color: #3f7f5f; font-size: small;"&gt;// divisor MSB&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #3f7f5f; font-size: small;"&gt;&lt;SPAN style="color: #3f7f5f; font-size: small;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;SPAN style="font-size: small;"&gt; SC16IS762_SPI_WriteByte (&lt;/SPAN&gt;&lt;SPAN style="color: #0000c0; font-size: small;"&gt;channel&lt;/SPAN&gt;&lt;SPAN style="font-size: small;"&gt;, &lt;/SPAN&gt;&lt;EM style=": ; color: #0000c0; font-size: small;"&gt;DLH&lt;/EM&gt;&lt;SPAN style="font-size: small;"&gt;, (baudRate[rate] &amp;gt;&amp;gt; 8); &lt;/SPAN&gt;&lt;/SPAN&gt;&lt;SPAN style="color: #3f7f5f; font-size: small;"&gt; &lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #3f7f5f; font-size: small;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // access EFR register&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: small;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; SC16IS762_SPI_WriteByte (&lt;/SPAN&gt;&lt;SPAN style="color: #0000c0; font-size: small;"&gt;spiModule&lt;/SPAN&gt;&lt;SPAN style="font-size: small;"&gt;, pDev-&amp;gt;&lt;/SPAN&gt;&lt;SPAN style="color: #0000c0; font-size: small;"&gt;channel&lt;/SPAN&gt;&lt;SPAN style="font-size: small;"&gt;, &lt;/SPAN&gt;&lt;EM style=": ; color: #0000c0; font-size: small;"&gt;LCR&lt;/EM&gt;&lt;SPAN style="font-size: small;"&gt;, 0xBF); &lt;/SPAN&gt;&lt;/P&gt;&lt;SPAN style="color: #3f7f5f; font-size: small;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;SPAN style="color: #3f7f5f; font-size: small;"&gt;// disable enhanced registers&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;P&gt;&lt;SPAN style="font-size: small;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; SC16IS762_SPI_WriteByte (&lt;/SPAN&gt;&lt;SPAN style="color: #0000c0; font-size: small;"&gt;spiModule&lt;/SPAN&gt;&lt;SPAN style="font-size: small;"&gt;, pDev-&amp;gt;&lt;/SPAN&gt;&lt;SPAN style="color: #0000c0; font-size: small;"&gt;channel&lt;/SPAN&gt;&lt;SPAN style="font-size: small;"&gt;, &lt;/SPAN&gt;&lt;EM style=": ; color: #0000c0; font-size: small;"&gt;EFR&lt;/EM&gt;&lt;SPAN style="font-size: small;"&gt;, 0X00); &lt;SPAN style="color: #3f7f5f; font-size: small;"&gt; 
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;SPAN style="color: #3f7f5f; font-size: small;"&gt;// 8 data bit, 1 stop bit, no parity&lt;/SPAN&gt;
&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: small;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; SC16IS762_SPI_WriteByte (&lt;/SPAN&gt;&lt;SPAN style="color: #0000c0; font-size: small;"&gt;spiModule&lt;/SPAN&gt;&lt;SPAN style="font-size: small;"&gt;, pDev-&amp;gt;&lt;/SPAN&gt;&lt;SPAN style="color: #0000c0; font-size: small;"&gt;channel&lt;/SPAN&gt;&lt;SPAN style="font-size: small;"&gt;, &lt;/SPAN&gt;&lt;EM style=": ; color: #0000c0; font-size: small;"&gt;LCR&lt;/EM&gt;&lt;SPAN style="font-size: small;"&gt;, 0x03, 1); &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: small;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; }&lt;/SPAN&gt;&lt;/P&gt;&lt;/PRE&gt;&lt;PRE&gt;&lt;/PRE&gt;&lt;P&gt;I have the dual UART on our own card with a crystal attached to pin XTAL1, XTAL2 is not connected.&lt;/P&gt;&lt;P&gt;I have connected TXA to RXB and vice versa.&lt;/P&gt;&lt;P&gt;I have a test application that sets both channels up with the same baud rate and then sends four bytes of data to one channel and reads it back on the other&lt;/P&gt;&lt;PRE&gt;&lt;SPAN style="font-size: small;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;SPAN&gt;&lt;SPAN&gt;uint8_t&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;SPAN&gt; rxBuff[16];
&amp;nbsp;&amp;nbsp;&amp;nbsp; uint32_t test1 = 0xAA55AA55;
&lt;/SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; uint32_t test5 = 0x0F0AF50D;
&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;BSP_RS422_SendData(ch1, (&lt;/SPAN&gt;&lt;SPAN&gt;&lt;SPAN&gt;uint8_t&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;SPAN&gt; *)&amp;amp;test1, 4);&lt;/SPAN&gt;
&amp;nbsp;&amp;nbsp;&amp;nbsp; BSP_RS422_ReadData(ch2, rxBuff, 16);
&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; ARM_printf(&lt;/SPAN&gt;&lt;SPAN&gt;&lt;SPAN&gt;"Received 0x%x\n"&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;SPAN&gt;, *(&lt;/SPAN&gt;&lt;SPAN&gt;&lt;SPAN&gt;uint32_t&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;SPAN&gt; *)rxBuff);&lt;/SPAN&gt;

&lt;SPAN&gt;&amp;nbsp;&amp;nbsp; &amp;nbsp;BSP_RS422_SendData(ch2, (&lt;/SPAN&gt;&lt;SPAN&gt;&lt;SPAN&gt;uint8_t&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;SPAN&gt; *)&amp;amp;test5, 4);&lt;/SPAN&gt;
&amp;nbsp;&amp;nbsp;&amp;nbsp; BSP_RS422_ReadData(ch1, rxBuff, 16);
&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;ARM_printf(&lt;/SPAN&gt;&lt;SPAN&gt;&lt;SPAN&gt;"Received 0x %x\n"&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;SPAN&gt;, *(&lt;/SPAN&gt;&lt;SPAN&gt;&lt;SPAN&gt;uint32_t&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;SPAN&gt; *)rxBuff);&lt;/SPAN&gt;&lt;/PRE&gt;&lt;P&gt;&lt;SPAN&gt;&lt;BR /&gt;I have an oscilloscope set up on the output and see the full four bytes transmitted.&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;When I inspect the RXLVL register, it contains the value 1 and the RHR contains the first byte transmitted.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Please can someone suggest what I have missed in the setup.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Many thanks&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;dan&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 14 Sep 2018 12:56:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/SC16IS762-FIFO-operation/m-p/828022#M6394</guid>
      <dc:creator>dansmithers</dc:creator>
      <dc:date>2018-09-14T12:56:10Z</dc:date>
    </item>
    <item>
      <title>Re: SC16IS762 FIFO operation</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/SC16IS762-FIFO-operation/m-p/828023#M6395</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks for looking. I think that I have found the problem. I was flushing the Rx and Tx FIFOs by setting bits 1 or 2 in the FCR and not resetting bit 0 which stopped the FIFOs.&lt;/P&gt;&lt;P&gt;dan&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 18 Sep 2018 07:27:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/SC16IS762-FIFO-operation/m-p/828023#M6395</guid>
      <dc:creator>dansmithers</dc:creator>
      <dc:date>2018-09-18T07:27:02Z</dc:date>
    </item>
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