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    <title>Other NXP ProductsのトピックRe: PTN36043 DE/OS/EQ setting</title>
    <link>https://community.nxp.com/t5/Other-NXP-Products/PTN36043-DE-OS-EQ-setting/m-p/769322#M5823</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt;"&gt;By default, using the open (default) settings should work. (CHx_SETx = OPEN)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt;"&gt;But for the first build, I would suggest to still have the pull up and pull down resistor footprints in place on the setting pins, just in case the OPEN settings are not optimum.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt;"&gt;If this your new design you can consider about PTN36043A part, it will be more USB-C &amp;nbsp;compliant.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt;"&gt;The difference between the PTN36043 and PTN36043A is that &lt;/SPAN&gt;&lt;/P&gt;&lt;UL style="margin-top: 0cm;"&gt;&lt;LI&gt;&lt;SPAN style="font-size: 11.0pt;"&gt;In PTN36043, the unused (or un-selected) channels&lt;/SPAN&gt;&lt;SPAN style="font-size: 11.0pt;"&gt;’&lt;/SPAN&gt;&lt;SPAN style="font-size: 11.0pt;"&gt; SSTX and SSRX are tie to low ohmic&lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN style="font-size: 11.0pt;"&gt;In PTN36043A, the unused (or un-selected) channels&lt;/SPAN&gt;&lt;SPAN style="font-size: 11.0pt;"&gt;’&lt;/SPAN&gt;&lt;SPAN style="font-size: 11.0pt;"&gt; SSTX and SSRX are tie to high ohmic&lt;/SPAN&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt;"&gt;The reason is to be comply with Type-C&lt;/SPAN&gt;&lt;SPAN style="font-size: 11.0pt;"&gt;’&lt;/SPAN&gt;&lt;SPAN style="font-size: 11.0pt;"&gt;s safe state requirement.&lt;/SPAN&gt;&lt;SPAN style="font-size: 11.0pt;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 30 May 2018 01:40:42 GMT</pubDate>
    <dc:creator>guoweisun</dc:creator>
    <dc:date>2018-05-30T01:40:42Z</dc:date>
    <item>
      <title>PTN36043 DE/OS/EQ setting</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/PTN36043-DE-OS-EQ-setting/m-p/769321#M5822</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear Sir,&lt;/P&gt;&lt;P&gt;Good day,&lt;/P&gt;&lt;P&gt;For my application,&lt;/P&gt;&lt;P&gt;PTN36043 very close&amp;nbsp; with&amp;nbsp;Processor Qualcomm SDX20.&lt;/P&gt;&lt;P&gt;Any comment for DE/OS/EQ setting in Processor side?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 18 May 2018 16:03:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/PTN36043-DE-OS-EQ-setting/m-p/769321#M5822</guid>
      <dc:creator>jackylu</dc:creator>
      <dc:date>2018-05-18T16:03:46Z</dc:date>
    </item>
    <item>
      <title>Re: PTN36043 DE/OS/EQ setting</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/PTN36043-DE-OS-EQ-setting/m-p/769322#M5823</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt;"&gt;By default, using the open (default) settings should work. (CHx_SETx = OPEN)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt;"&gt;But for the first build, I would suggest to still have the pull up and pull down resistor footprints in place on the setting pins, just in case the OPEN settings are not optimum.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt;"&gt;If this your new design you can consider about PTN36043A part, it will be more USB-C &amp;nbsp;compliant.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt;"&gt;The difference between the PTN36043 and PTN36043A is that &lt;/SPAN&gt;&lt;/P&gt;&lt;UL style="margin-top: 0cm;"&gt;&lt;LI&gt;&lt;SPAN style="font-size: 11.0pt;"&gt;In PTN36043, the unused (or un-selected) channels&lt;/SPAN&gt;&lt;SPAN style="font-size: 11.0pt;"&gt;’&lt;/SPAN&gt;&lt;SPAN style="font-size: 11.0pt;"&gt; SSTX and SSRX are tie to low ohmic&lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN style="font-size: 11.0pt;"&gt;In PTN36043A, the unused (or un-selected) channels&lt;/SPAN&gt;&lt;SPAN style="font-size: 11.0pt;"&gt;’&lt;/SPAN&gt;&lt;SPAN style="font-size: 11.0pt;"&gt; SSTX and SSRX are tie to high ohmic&lt;/SPAN&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt;"&gt;The reason is to be comply with Type-C&lt;/SPAN&gt;&lt;SPAN style="font-size: 11.0pt;"&gt;’&lt;/SPAN&gt;&lt;SPAN style="font-size: 11.0pt;"&gt;s safe state requirement.&lt;/SPAN&gt;&lt;SPAN style="font-size: 11.0pt;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 30 May 2018 01:40:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/PTN36043-DE-OS-EQ-setting/m-p/769322#M5823</guid>
      <dc:creator>guoweisun</dc:creator>
      <dc:date>2018-05-30T01:40:42Z</dc:date>
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