topic Re: MPC551x software interrupts, blrl problem in Other NXP Products

MPC551x software interrupts, blrl problem

saltisol — Tue, 03 Feb 2009 23:41:23 GMT

Hi,

I am implementing a software external interrupt on my 551x system, using PIT timer 1 (vector 149). When reading the MPC5510 reference manual, the application note AN2865 and looking at RAppID generated code, they all suggest the same procedure for getting execution to my ISR, which I do:

at init:
1) INTC.MCR.R = 0x0 (SW vect, 4 byte)
2) load INTC.IACKR_PRC0.R = (vuint32_t)&IntcIsrVectorTable_z1; (located at 0x00002000)
3) let IntcIsrVectorTable_z1[149] contain address to PIT ISR: IntcIsrVectorTable_z1[149] = (uint32_t)&pit_isr, which in my case is 0x00003b80
4) set PIT and processor priorities properly (PIT prio 5, core z1 prio 4)

then in my "main" interrupt table, containing all IVOR0-15:

1) at IVOR 4 (in my case 0x00001040) branch to a prolog saving GPR + CR, LR etc in a 0x50 (80 byte) stack frame. Also read INTC_IACKR_PRC0 and save content into LR
2) execute 'blrl' which will branch to LR (containing 0x00002254 - correct), saving return address. It should also move execution to the address specified at this vector 149 but here is where my problems start...

PROBLEM:
------------------
When the processor gets to this point (PC at 0x00002254), it tries to execute the contents of this address which is 0x00003b80. This corresponds to some undefined OPCODE which eventually gives me a IVOR 6 PROGRAM EXCEPTION....

However, if I manually write the OPCODE for branching from vector[149] to &pit_isr, which in my case is 0x48001928 I get a correct behaviour and everything works perfectly...
this does however feel like the much too complicated way of doing this and since all litterature I have found tell me to only put the address of "where I am going" instead of the asm-instruction of how to go there, I feel like I am missing something...

Very grateful for your assistance

Re: MPC551x software interrupts, blrl problem

dayve — Thu, 05 Mar 2009 17:05:52 GMT

You should read INTC_IACKR_PRC0 but do not copy it into the link register. IACKR contains the location in the vector table where you will find the address of the appropriate ISR for this interrupt.

So you need to Read IACR to find out where in the vector table you will find the address of your ISR. Read the value at the this location in the vector table and save this into the link register as this is the address of you ISR. Please see the example below:

    e_stwu   r1, -0x50 (r1)        # Create stack frame and store back chain
    e_stw    r3, 0x28 (r1)         # Save working registers R3
    mfSRR1   r3                    # Store SRR1 (must be done before enabling EE)
    e_stw    r3, 0x10 (r1)
    mfSRR0   r3                    # Store SRR0 (must be done before enabling EE)
    e_stw    r3, 0x0C (r1)
    e_lis    r3, INTC_IACKR_PRC1@ha     # Store address of IACKR in r3
    e_lwz    r3, INTC_IACKR_PRC1@l(r3) # Store contents of IACKR in r3 (this is vector table address)
    wrteei 1                       # Set MSR[EE]=1 (must wait a couple clocks after reading IACKR)
    e_lwz    r3, 0x0(r3)           # Read ISR address from ISR Vector Table using pointer
    e_stw    r4, 0x2c (r1)        # Store another working register
    mfLR     r4                    # Store LR (Store now since LR will be used for ISR Vector)
    e_stw    r4, 0x14 (r1)
    mtLR     r3                    # Store ISR address (from IACKR) to LR to use for branching later
    e_stw    r12, 0x4C (r1)        # Store rest of gprs
    e_stw    r11, 0x48 (r1)
    e_stw    r10, 0x44 (r1)
    e_stw    r9, 0x40 (r1)
    e_stw    r8, 0x3C (r1)
    e_stw    r7, 0x38 (r1)
    e_stw    r6, 0x34 (r1)
    e_stw    r5, 0x30 (r1)
    e_stw    r0, 0x24 (r1)
    mfCR     r3                    # Store CR
    e_stw    r3, 0x20 (r1)
    mfXER    r3                    # Store XER
    e_stw    r3, 0x1C (r1)
    mfCTR    r3                    # Store CTR
    e_stw    r3, 0x18 (r1)
    se_blrl                        # Branch to ISR, but return here

Re: MPC551x software interrupts, blrl problem

Routh — Mon, 11 Jul 2011 11:03:20 GMT

Hi,

I have problem about stack on my 5604b system.

I want to create a section of stack frame, the size of which is 0xA8 byte.

the code like this:

e_stwu r1, -0xA8 (r1)

but the result is r1=r1-0x58 , I don't know what happened.How can I reliaze this purpose?

Very grateful for your assistance