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    <title>topic Re: Request for Bare-Metal Reference Code and Examples for LX2080A Using CodeWarrior Studio in Other NXP Products</title>
    <link>https://community.nxp.com/t5/Other-NXP-Products/Request-for-Bare-Metal-Reference-Code-and-Examples-for-LX2080A/m-p/2405834#M33201</link>
    <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;H3 class="_9k2iva0 p8i6j0c _1ibi0s314 heading3 _9k2iva1"&gt;Built-in CodeWarrior Example Projects&lt;/H3&gt;
&lt;P class="p8i6j01 paragraph"&gt;After installing CodeWarrior for QorIQ LS Series ARMv8, the following &lt;STRONG&gt;stationery/example projects&lt;/STRONG&gt; are available directly in the IDE: &lt;A id="base-ui-:r1vr:" class="wdbi343 wdbi341 _1ibi0s3ec _1ibi0s376" tabindex="0" role="button" href="https://www.nxp.com/docs/en/user-guide/CWARMv8TM.pdf" rel="noreferrer" aria-expanded="false" aria-haspopup="dialog" data-base-ui-click-trigger="" data-label="3" aria-label="Citation 3" target="_blank"&gt;&lt;/A&gt;&lt;/P&gt;
&lt;H4 class="_9k2iva0 p8i6j0c _1ibi0s314 heading4 _9k2iva1"&gt;Bare-Metal Project Creation (New Project Wizard)&lt;/H4&gt;
&lt;OL class="p8i6j02"&gt;
&lt;LI class="p8i6j0a"&gt;Open CodeWarrior IDE → &lt;STRONG&gt;File &amp;gt; New &amp;gt; ARMv8 Stationery&lt;/STRONG&gt;&lt;/LI&gt;
&lt;LI class="p8i6j0a"&gt;Select: &lt;STRONG&gt;ARMv8 &amp;gt; Bare board &amp;gt; Hello World C Project&lt;/STRONG&gt;&lt;/LI&gt;
&lt;LI class="p8i6j0a"&gt;Build and debug the bare-metal project &lt;A id="base-ui-:r1vu:" class="wdbi343 wdbi341 _1ibi0s3ec _1ibi0s376" tabindex="0" role="button" href="https://www.nxp.com/docs/en/user-guide/CWARMv8TM.pdf" rel="noreferrer" aria-expanded="false" aria-haspopup="dialog" data-base-ui-click-trigger="" data-label="3" aria-label="Citation 3" target="_blank"&gt;&lt;/A&gt;&lt;/LI&gt;
&lt;/OL&gt;
&lt;H4 class="_9k2iva0 p8i6j0c _1ibi0s314 heading4 _9k2iva1"&gt;AMP Multicore Example (HelloWorld_C_AMP_Bare)&lt;/H4&gt;
&lt;P class="p8i6j01 paragraph"&gt;Located at: &lt;CODE class="p8i6j0f"&gt;&amp;lt;CWInstallDir&amp;gt;\CW_ARMv8\ARMv8\CodeWarrior_Examples\HelloWorld_C_AMP_Bare\&lt;/CODE&gt;&lt;A id="base-ui-:r201:" class="wdbi343 wdbi341 _1ibi0s3ec _1ibi0s376" tabindex="0" role="button" href="https://community.nxp.com/t5/forums/forumtopicprintpage/board-id/cw-qoriq/message-id/7182/print-single-message/false/page/1?profile.language=en" rel="noreferrer" aria-expanded="false" aria-haspopup="dialog" data-base-ui-click-trigger="" data-label="8" aria-label="Citation 8" target="_blank"&gt;&lt;/A&gt;&lt;/P&gt;
&lt;P class="p8i6j01 paragraph"&gt;This example includes:&lt;/P&gt;
&lt;UL class="p8i6j07 p8i6j02"&gt;
&lt;LI class="p8i6j0a"&gt;Bare-metal startup code (&lt;CODE class="p8i6j0f"&gt;start.S&lt;/CODE&gt;)&lt;/LI&gt;
&lt;LI class="p8i6j0a"&gt;Exception handlers (&lt;CODE class="p8i6j0f"&gt;exceptions.c&lt;/CODE&gt;, &lt;CODE class="p8i6j0f"&gt;exceptions.S&lt;/CODE&gt;)&lt;/LI&gt;
&lt;LI class="p8i6j0a"&gt;Linker scripts with configurable &lt;CODE class="p8i6j0f"&gt;___DDR_ADDRESS&lt;/CODE&gt;, &lt;CODE class="p8i6j0f"&gt;___MEMORY_SIZE&lt;/CODE&gt;, &lt;CODE class="p8i6j0f"&gt;___CORE_NUMBER&lt;/CODE&gt;&lt;/LI&gt;
&lt;LI class="p8i6j0a"&gt;SMP/AMP multicore support &lt;A id="base-ui-:r203:" class="wdbi343 wdbi341 _1ibi0s3ec _1ibi0s376" tabindex="0" role="button" href="https://www.nxp.com.cn/docs/en/release-note/CW-ARMV8-RN.pdf" rel="noreferrer" aria-expanded="false" aria-haspopup="dialog" data-base-ui-click-trigger="" data-label="4" aria-label="Citation 4" target="_blank"&gt;&lt;/A&gt;&lt;/LI&gt;
&lt;/UL&gt;
&lt;BLOCKQUOTE class="p8i6j03"&gt;
&lt;P class="p8i6j01 paragraph"&gt;&lt;STRONG&gt;Multicore tip (LX2160A/LX2080A):&lt;/STRONG&gt; To run on cores beyond Core 0 and Core 1, duplicate the &lt;CODE class="p8i6j0f"&gt;LX2160A_RDB&lt;/CODE&gt; target connection and modify the Target Initialization File with the correct &lt;CODE class="p8i6j0f"&gt;CORE_CONTEXT&lt;/CODE&gt; and &lt;CODE class="p8i6j0f"&gt;SAP_CORE_CONTEXT&lt;/CODE&gt; for each additional core. Disable DDR/PHY re-initialization for secondary cores. &lt;A id="base-ui-:r207:" class="wdbi343 wdbi341 _1ibi0s3ec _1ibi0s376" tabindex="0" role="button" href="https://community.nxp.com/t5/forums/forumtopicprintpage/board-id/cw-qoriq/message-id/7182/print-single-message/false/page/1?profile.language=en" rel="noreferrer" aria-expanded="false" aria-haspopup="dialog" data-base-ui-click-trigger="" data-label="8" aria-label="Citation 8" target="_blank"&gt;&lt;/A&gt;&lt;/P&gt;
&lt;/BLOCKQUOTE&gt;
&lt;H4 class="_9k2iva0 p8i6j0c _1ibi0s314 heading4 _9k2iva1"&gt;Library Projects (source available for recompilation)&lt;/H4&gt;
&lt;P class="p8i6j01 paragraph"&gt;Located at: &lt;CODE class="p8i6j0f"&gt;{CW_ARMv8}\ARMv8\CodeWarrior_Examples\&lt;/CODE&gt;&lt;A id="base-ui-:r20a:" class="wdbi343 wdbi341 _1ibi0s3ec _1ibi0s376" tabindex="0" role="button" href="https://www.nxp.com/docs/en/user-guide/CWARMv8TM.pdf" rel="noreferrer" aria-expanded="false" aria-haspopup="dialog" data-base-ui-click-trigger="" data-label="3" aria-label="Citation 3" target="_blank"&gt;&lt;/A&gt;&lt;/P&gt;
&lt;UL class="p8i6j07 p8i6j02"&gt;
&lt;LI class="p8i6j0a"&gt;&lt;STRONG&gt;&lt;CODE class="p8i6j0f"&gt;UART_C_Static_Lib_Bare&lt;/CODE&gt;&lt;/STRONG&gt; — printf support through UART port (note: this library targets LS-series UART; the LX2160A/LX2080A uses a different UART controller — see note below) &lt;A id="base-ui-:r20d:" class="wdbi343 wdbi341 _1ibi0s3ec _1ibi0s376" tabindex="0" role="button" href="https://www.nxp.com/docs/en/user-guide/CWARMv8TM.pdf" rel="noreferrer" aria-expanded="false" aria-haspopup="dialog" data-base-ui-click-trigger="" data-label="3" aria-label="Citation 3" target="_blank"&gt;&lt;/A&gt;&lt;/LI&gt;
&lt;LI class="p8i6j0a"&gt;Switch from semihosted I/O to UART by replacing &lt;CODE class="p8i6j0f"&gt;simrdimon.specs&lt;/CODE&gt; with &lt;CODE class="p8i6j0f"&gt;uart.specs&lt;/CODE&gt; in linker flags &lt;A id="base-ui-:r20g:" class="wdbi343 wdbi341 _1ibi0s3ec _1ibi0s376" tabindex="0" role="button" href="https://www.nxp.com/docs/en/user-guide/CWARMv8TM.pdf" rel="noreferrer" aria-expanded="false" aria-haspopup="dialog" data-base-ui-click-trigger="" data-label="3" aria-label="Citation 3" target="_blank"&gt;&lt;/A&gt;&lt;/LI&gt;
&lt;/UL&gt;
&lt;HR /&gt;
&lt;H3 class="_9k2iva0 p8i6j0c _1ibi0s314 heading3 _9k2iva1"&gt;DDR Initialization&lt;/H3&gt;
&lt;P class="p8i6j01 paragraph"&gt;For the LX2080A, DDR initialization in a bare-metal context follows the same flow as LX2160A:&lt;/P&gt;
&lt;UL class="p8i6j07 p8i6j02"&gt;
&lt;LI class="p8i6j0a"&gt;&lt;STRONG&gt;QCVS DDRv Tool&lt;/STRONG&gt; (bundled with CodeWarrior) is used to validate DDR and generate &lt;CODE class="p8i6j0f"&gt;ddr_init.c&lt;/CODE&gt;&lt;A id="base-ui-:r20j:" class="wdbi343 wdbi341 _1ibi0s3ec _1ibi0s376" tabindex="0" role="button" href="https://nxp.lightning.force.com/lightning/r/Case/5002p00002UAyoNAAT/view" rel="noreferrer" aria-expanded="false" aria-haspopup="dialog" data-base-ui-click-trigger="" data-label="9" aria-label="Citation 9" target="_blank"&gt;&lt;/A&gt;&lt;/LI&gt;
&lt;LI class="p8i6j0a"&gt;The generated code can be used in your bare-metal startup or as a reference for ATF-based initialization&lt;/LI&gt;
&lt;LI class="p8i6j0a"&gt;DDR PHY firmware (&lt;CODE class="p8i6j0f"&gt;fip_ddr.bin&lt;/CODE&gt;) must be deployed at &lt;CODE class="p8i6j0f"&gt;0x00800000&lt;/CODE&gt; on XSPI flash &lt;A id="base-ui-:r20m:" class="wdbi343 wdbi341 _1ibi0s3ec _1ibi0s376" tabindex="0" role="button" href="https://nxp.lightning.force.com/lightning/r/Case/500Tg00000NKVnRIAX/view" rel="noreferrer" aria-expanded="false" aria-haspopup="dialog" data-base-ui-click-trigger="" data-label="10" aria-label="Citation 10" target="_blank"&gt;&lt;/A&gt;&lt;/LI&gt;
&lt;LI class="p8i6j0a"&gt;GPP DRAM Region #1 starts at &lt;CODE class="p8i6j0f"&gt;0x0000_8000_0000&lt;/CODE&gt;; Region #1 must be included (DPAA/QMAN dependency) &lt;A id="base-ui-:r20p:" class="wdbi343 wdbi341 _1ibi0s3ec _1ibi0s376" tabindex="0" role="button" href="https://nxp.lightning.force.com/lightning/r/Case/500Tg00000I232uIAB/view" rel="noreferrer" aria-expanded="false" aria-haspopup="dialog" data-base-ui-click-trigger="" data-label="11" aria-label="Citation 11" target="_blank"&gt;&lt;/A&gt;&lt;/LI&gt;
&lt;/UL&gt;
&lt;P class="p8i6j01 paragraph"&gt;&lt;STRONG&gt;Linker script DDR configuration example:&lt;/STRONG&gt;&lt;/P&gt;
&lt;DIV class="l8rrz21 _1ibi0s3en" data-ui-element="code-block-container"&gt;
&lt;PRE&gt;&lt;CODE class="markdown-code-ld p8i6j0e hljs language-ld _12n1b832"&gt;PROVIDE (&lt;SPAN class="hljs-strong"&gt;__&lt;SPAN class="hljs-emphasis"&gt;_DDR_&lt;/SPAN&gt;ADDRESS = 0x80000000);
PROVIDE (__&lt;/SPAN&gt;&lt;SPAN class="hljs-emphasis"&gt;_MEMORY_&lt;/SPAN&gt;SIZE = 0x1effffff);
PROVIDE (&lt;SPAN class="hljs-strong"&gt;__&lt;SPAN class="hljs-emphasis"&gt;_CORE_&lt;/SPAN&gt;NUMBER = 0);
PROVIDE (__&lt;/SPAN&gt;&lt;SPAN class="hljs-emphasis"&gt;_START_&lt;/SPAN&gt;RAM&lt;SPAN class="hljs-emphasis"&gt;_ADDRESS = &lt;SPAN class="hljs-strong"&gt;___DDR_ADDRESS + __&lt;/SPAN&gt;_&lt;/SPAN&gt;CORE&lt;SPAN class="hljs-emphasis"&gt;_NUMBER * &lt;SPAN class="hljs-strong"&gt;___MEMORY_SIZE);
&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/CODE&gt;&lt;/PRE&gt;
&lt;/DIV&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;HR /&gt;
&lt;H3 class="_9k2iva0 p8i6j0c _1ibi0s314 heading3 _9k2iva1"&gt;&amp;nbsp;UART on LX2080A — Important Note&lt;/H3&gt;
&lt;P class="p8i6j01 paragraph"&gt;The &lt;STRONG&gt;LX2080A UART controller is NOT backward compatible&lt;/STRONG&gt; with the PrimeCell UART used in LS-series processors. &lt;A id="base-ui-:r212:" class="wdbi343 wdbi341 _1ibi0s3ec _1ibi0s376" tabindex="0" role="button" href="https://community.nxp.com/t5/QorIQ/bd-p/qoriq-grl" rel="noreferrer" aria-expanded="false" aria-haspopup="dialog" data-base-ui-click-trigger="" data-label="12" aria-label="Citation 12" target="_blank"&gt;&lt;/A&gt;The built-in &lt;CODE class="p8i6j0f"&gt;UART_C_Static_Lib_Bare&lt;/CODE&gt; library only supports LS-series UART. For LX2080A UART output, you will need to implement your own driver based on the LX2160A Reference Manual UART register map, or reference SDK UART driver examples. &lt;A id="base-ui-:r215:" class="wdbi343 wdbi341 _1ibi0s3ec _1ibi0s376" tabindex="0" role="button" href="https://nxp.lightning.force.com/lightning/r/Case/5002p00002NDjsuAAD/view" rel="noreferrer" aria-expanded="false" aria-haspopup="dialog" data-base-ui-click-trigger="" data-label="13" aria-label="Citation 13" target="_blank"&gt;&lt;/A&gt;&lt;/P&gt;
&lt;P class="p8i6j01 paragraph"&gt;Community resources for UART on LX2160A/LX2080A:&lt;/P&gt;
&lt;UL class="p8i6j07 p8i6j02"&gt;
&lt;LI class="p8i6j0a"&gt;&lt;SPAN&gt;&lt;A class="_1ibi0s3f5 markdown-link _1ibi0s376" href="https://community.nxp.com/t5/Layerscape/Using-printf-via-UART-in-a-bare-metal-project/m-p/771817" rel="noreferrer" target="_blank"&gt;Using printf via UART in a bare-metal project&lt;/A&gt;&lt;/SPAN&gt;&lt;A id="base-ui-:r218:" class="wdbi343 wdbi341 _1ibi0s3ec _1ibi0s376" tabindex="0" role="button" href="https://community.nxp.com/t5/forums/recentpostspage/post-type/message/user-id/203371" rel="noreferrer" aria-expanded="false" aria-haspopup="dialog" data-base-ui-click-trigger="" data-label="5" aria-label="Citation 5" target="_blank"&gt;&lt;/A&gt;&lt;/LI&gt;
&lt;LI class="p8i6j0a"&gt;&lt;SPAN&gt;&lt;A class="_1ibi0s3f5 markdown-link _1ibi0s376" href="https://community.nxp.com/t5/Layerscape/Compare-bare-metal-built-by-CodeWarrior-and-Realtime-Edge/m-p/1469221" rel="noreferrer" target="_blank"&gt;Compare bare-metal built by CodeWarrior and Realtime Edge&lt;/A&gt;&lt;/SPAN&gt;&lt;A id="base-ui-:r21b:" class="wdbi343 wdbi341 _1ibi0s3ec _1ibi0s376" tabindex="0" role="button" href="https://community.nxp.com/t5/forums/recentpostspage/post-type/message/user-id/203371" rel="noreferrer" aria-expanded="false" aria-haspopup="dialog" data-base-ui-click-trigger="" data-label="5" aria-label="Citation 5" target="_blank"&gt;&lt;/A&gt;&lt;/LI&gt;
&lt;/UL&gt;
&lt;HR /&gt;
&lt;H3 class="_9k2iva0 p8i6j0c _1ibi0s314 heading3 _9k2iva1"&gt;Real-Time Edge Software (Bare-Metal Framework)&lt;/H3&gt;
&lt;P class="p8i6j01 paragraph"&gt;NXP's &lt;STRONG&gt;Real-Time Edge Software&lt;/STRONG&gt; includes a bare-metal framework for LX2160ARDB-REV2 (compatible with LX2080A designs): &lt;A id="base-ui-:r21e:" class="wdbi343 wdbi341 _1ibi0s3ec _1ibi0s376" tabindex="0" role="button" href="https://www.nxp.com/design/design-center/software/development-software/real-time-edge-software:REALTIME-EDGE-SOFTWARE" rel="noreferrer" aria-expanded="false" aria-haspopup="dialog" data-base-ui-click-trigger="" data-label="14" aria-label="Citation 14" target="_blank"&gt;&lt;/A&gt;&lt;/P&gt;
&lt;UL class="p8i6j07 p8i6j02"&gt;
&lt;LI class="p8i6j0a"&gt;U-Boot-based bare-metal framework for low-latency scenarios&lt;/LI&gt;
&lt;LI class="p8i6j0a"&gt;Includes GPIO, IPI, inter-core communication examples&lt;/LI&gt;
&lt;LI class="p8i6j0a"&gt;Available at: &lt;SPAN&gt;&lt;A class="_1ibi0s3f5 markdown-link _1ibi0s376" href="https://www.nxp.com/design/design-center/software/development-software/real-time-edge-software:REALTIME-EDGE-SOFTWARE" rel="noreferrer" target="_blank"&gt;Real-Time Edge Software&lt;/A&gt;&lt;/SPAN&gt;&lt;/LI&gt;
&lt;/UL&gt;
&lt;P class="p8i6j01 paragraph"&gt;Community knowledge base article: &lt;SPAN&gt;&lt;A class="_1ibi0s3f5 markdown-link _1ibi0s376" href="https://community.nxp.com/t5/Layerscape-Knowledge-Base/tkb-p/Layerscape%40tkb" rel="noreferrer" target="_blank"&gt;Application Development based on BareMetal framework in Real-Time Edge Software&lt;/A&gt;&lt;/SPAN&gt;&lt;A id="base-ui-:r21h:" class="wdbi343 wdbi341 _1ibi0s3ec _1ibi0s376" tabindex="0" role="button" href="https://community.nxp.com/t5/forums/recentpostspage/interaction-style/tkb/post-type/thread/board-id/Layerscape/page/2" rel="noreferrer" aria-expanded="false" aria-haspopup="dialog" data-base-ui-click-trigger="" data-label="15" aria-label="Citation 15" target="_blank"&gt;&lt;/A&gt;&lt;/P&gt;
&lt;P class="p8i6j01 paragraph"&gt;&amp;nbsp;&lt;/P&gt;
&lt;P class="p8i6j01 paragraph"&gt;Regards&lt;/P&gt;</description>
    <pubDate>Mon, 17 Aug 2026 16:41:06 GMT</pubDate>
    <dc:creator>Bio_TICFSL</dc:creator>
    <dc:date>2026-08-17T16:41:06Z</dc:date>
    <item>
      <title>Request for Bare-Metal Reference Code and Examples for LX2080A Using CodeWarrior Studio</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/Request-for-Bare-Metal-Reference-Code-and-Examples-for-LX2080A/m-p/2405758#M33199</link>
      <description>&lt;DIV&gt;&lt;P&gt;Dear NXP Support Team,&lt;/P&gt;&lt;P&gt;I am currently working with the &lt;STRONG&gt;NXP Layerscape LX2080A processor&lt;/STRONG&gt; and developing applications in a &lt;STRONG&gt;bare-metal environment using CodeWarrior Development Studio&lt;/STRONG&gt;.&lt;/P&gt;&lt;P&gt;I would like to request any available resources, reference projects, or example codes for the following:&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;Bare-metal startup code for LX2080A&lt;/LI&gt;&lt;LI&gt;Initialization of DDR, clocks, and peripherals&lt;/LI&gt;&lt;LI&gt;Core bring-up and multicore examples&lt;/LI&gt;&lt;LI&gt;UART driver examples for console output&lt;/LI&gt;&lt;LI&gt;GPIO and timer programming examples&lt;/LI&gt;&lt;LI&gt;Interrupt handling examples&lt;/LI&gt;&lt;LI&gt;Linker scripts and memory map configurations&lt;/LI&gt;&lt;LI&gt;Any SDKs, application notes, or documentation related to bare-metal development on LX2080A&lt;/LI&gt;&lt;LI&gt;CodeWarrior project examples specifically targeted for LX2080A&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;My objective is to develop and debug bare-metal applications without an operating system, and any reference materials or sample projects would be highly appreciated.&lt;/P&gt;&lt;P&gt;Board Information:&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;Processor: NXP LX2080A&lt;/LI&gt;&lt;LI&gt;Development Environment: CodeWarrior Development Studio&lt;/LI&gt;&lt;LI&gt;Application Type: Bare-Metal Development&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;Please let me know if there are any recommended documents, repositories, training materials, or community resources available for this use case.&lt;/P&gt;&lt;P&gt;Thank you for your support&lt;BR /&gt;sai chandu&lt;/P&gt;&lt;/DIV&gt;</description>
      <pubDate>Mon, 17 Aug 2026 11:15:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/Request-for-Bare-Metal-Reference-Code-and-Examples-for-LX2080A/m-p/2405758#M33199</guid>
      <dc:creator>saichandu_p</dc:creator>
      <dc:date>2026-08-17T11:15:27Z</dc:date>
    </item>
    <item>
      <title>Re: Request for Bare-Metal Reference Code and Examples for LX2080A Using CodeWarrior Studio</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/Request-for-Bare-Metal-Reference-Code-and-Examples-for-LX2080A/m-p/2405834#M33201</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;H3 class="_9k2iva0 p8i6j0c _1ibi0s314 heading3 _9k2iva1"&gt;Built-in CodeWarrior Example Projects&lt;/H3&gt;
&lt;P class="p8i6j01 paragraph"&gt;After installing CodeWarrior for QorIQ LS Series ARMv8, the following &lt;STRONG&gt;stationery/example projects&lt;/STRONG&gt; are available directly in the IDE: &lt;A id="base-ui-:r1vr:" class="wdbi343 wdbi341 _1ibi0s3ec _1ibi0s376" tabindex="0" role="button" href="https://www.nxp.com/docs/en/user-guide/CWARMv8TM.pdf" rel="noreferrer" aria-expanded="false" aria-haspopup="dialog" data-base-ui-click-trigger="" data-label="3" aria-label="Citation 3" target="_blank"&gt;&lt;/A&gt;&lt;/P&gt;
&lt;H4 class="_9k2iva0 p8i6j0c _1ibi0s314 heading4 _9k2iva1"&gt;Bare-Metal Project Creation (New Project Wizard)&lt;/H4&gt;
&lt;OL class="p8i6j02"&gt;
&lt;LI class="p8i6j0a"&gt;Open CodeWarrior IDE → &lt;STRONG&gt;File &amp;gt; New &amp;gt; ARMv8 Stationery&lt;/STRONG&gt;&lt;/LI&gt;
&lt;LI class="p8i6j0a"&gt;Select: &lt;STRONG&gt;ARMv8 &amp;gt; Bare board &amp;gt; Hello World C Project&lt;/STRONG&gt;&lt;/LI&gt;
&lt;LI class="p8i6j0a"&gt;Build and debug the bare-metal project &lt;A id="base-ui-:r1vu:" class="wdbi343 wdbi341 _1ibi0s3ec _1ibi0s376" tabindex="0" role="button" href="https://www.nxp.com/docs/en/user-guide/CWARMv8TM.pdf" rel="noreferrer" aria-expanded="false" aria-haspopup="dialog" data-base-ui-click-trigger="" data-label="3" aria-label="Citation 3" target="_blank"&gt;&lt;/A&gt;&lt;/LI&gt;
&lt;/OL&gt;
&lt;H4 class="_9k2iva0 p8i6j0c _1ibi0s314 heading4 _9k2iva1"&gt;AMP Multicore Example (HelloWorld_C_AMP_Bare)&lt;/H4&gt;
&lt;P class="p8i6j01 paragraph"&gt;Located at: &lt;CODE class="p8i6j0f"&gt;&amp;lt;CWInstallDir&amp;gt;\CW_ARMv8\ARMv8\CodeWarrior_Examples\HelloWorld_C_AMP_Bare\&lt;/CODE&gt;&lt;A id="base-ui-:r201:" class="wdbi343 wdbi341 _1ibi0s3ec _1ibi0s376" tabindex="0" role="button" href="https://community.nxp.com/t5/forums/forumtopicprintpage/board-id/cw-qoriq/message-id/7182/print-single-message/false/page/1?profile.language=en" rel="noreferrer" aria-expanded="false" aria-haspopup="dialog" data-base-ui-click-trigger="" data-label="8" aria-label="Citation 8" target="_blank"&gt;&lt;/A&gt;&lt;/P&gt;
&lt;P class="p8i6j01 paragraph"&gt;This example includes:&lt;/P&gt;
&lt;UL class="p8i6j07 p8i6j02"&gt;
&lt;LI class="p8i6j0a"&gt;Bare-metal startup code (&lt;CODE class="p8i6j0f"&gt;start.S&lt;/CODE&gt;)&lt;/LI&gt;
&lt;LI class="p8i6j0a"&gt;Exception handlers (&lt;CODE class="p8i6j0f"&gt;exceptions.c&lt;/CODE&gt;, &lt;CODE class="p8i6j0f"&gt;exceptions.S&lt;/CODE&gt;)&lt;/LI&gt;
&lt;LI class="p8i6j0a"&gt;Linker scripts with configurable &lt;CODE class="p8i6j0f"&gt;___DDR_ADDRESS&lt;/CODE&gt;, &lt;CODE class="p8i6j0f"&gt;___MEMORY_SIZE&lt;/CODE&gt;, &lt;CODE class="p8i6j0f"&gt;___CORE_NUMBER&lt;/CODE&gt;&lt;/LI&gt;
&lt;LI class="p8i6j0a"&gt;SMP/AMP multicore support &lt;A id="base-ui-:r203:" class="wdbi343 wdbi341 _1ibi0s3ec _1ibi0s376" tabindex="0" role="button" href="https://www.nxp.com.cn/docs/en/release-note/CW-ARMV8-RN.pdf" rel="noreferrer" aria-expanded="false" aria-haspopup="dialog" data-base-ui-click-trigger="" data-label="4" aria-label="Citation 4" target="_blank"&gt;&lt;/A&gt;&lt;/LI&gt;
&lt;/UL&gt;
&lt;BLOCKQUOTE class="p8i6j03"&gt;
&lt;P class="p8i6j01 paragraph"&gt;&lt;STRONG&gt;Multicore tip (LX2160A/LX2080A):&lt;/STRONG&gt; To run on cores beyond Core 0 and Core 1, duplicate the &lt;CODE class="p8i6j0f"&gt;LX2160A_RDB&lt;/CODE&gt; target connection and modify the Target Initialization File with the correct &lt;CODE class="p8i6j0f"&gt;CORE_CONTEXT&lt;/CODE&gt; and &lt;CODE class="p8i6j0f"&gt;SAP_CORE_CONTEXT&lt;/CODE&gt; for each additional core. Disable DDR/PHY re-initialization for secondary cores. &lt;A id="base-ui-:r207:" class="wdbi343 wdbi341 _1ibi0s3ec _1ibi0s376" tabindex="0" role="button" href="https://community.nxp.com/t5/forums/forumtopicprintpage/board-id/cw-qoriq/message-id/7182/print-single-message/false/page/1?profile.language=en" rel="noreferrer" aria-expanded="false" aria-haspopup="dialog" data-base-ui-click-trigger="" data-label="8" aria-label="Citation 8" target="_blank"&gt;&lt;/A&gt;&lt;/P&gt;
&lt;/BLOCKQUOTE&gt;
&lt;H4 class="_9k2iva0 p8i6j0c _1ibi0s314 heading4 _9k2iva1"&gt;Library Projects (source available for recompilation)&lt;/H4&gt;
&lt;P class="p8i6j01 paragraph"&gt;Located at: &lt;CODE class="p8i6j0f"&gt;{CW_ARMv8}\ARMv8\CodeWarrior_Examples\&lt;/CODE&gt;&lt;A id="base-ui-:r20a:" class="wdbi343 wdbi341 _1ibi0s3ec _1ibi0s376" tabindex="0" role="button" href="https://www.nxp.com/docs/en/user-guide/CWARMv8TM.pdf" rel="noreferrer" aria-expanded="false" aria-haspopup="dialog" data-base-ui-click-trigger="" data-label="3" aria-label="Citation 3" target="_blank"&gt;&lt;/A&gt;&lt;/P&gt;
&lt;UL class="p8i6j07 p8i6j02"&gt;
&lt;LI class="p8i6j0a"&gt;&lt;STRONG&gt;&lt;CODE class="p8i6j0f"&gt;UART_C_Static_Lib_Bare&lt;/CODE&gt;&lt;/STRONG&gt; — printf support through UART port (note: this library targets LS-series UART; the LX2160A/LX2080A uses a different UART controller — see note below) &lt;A id="base-ui-:r20d:" class="wdbi343 wdbi341 _1ibi0s3ec _1ibi0s376" tabindex="0" role="button" href="https://www.nxp.com/docs/en/user-guide/CWARMv8TM.pdf" rel="noreferrer" aria-expanded="false" aria-haspopup="dialog" data-base-ui-click-trigger="" data-label="3" aria-label="Citation 3" target="_blank"&gt;&lt;/A&gt;&lt;/LI&gt;
&lt;LI class="p8i6j0a"&gt;Switch from semihosted I/O to UART by replacing &lt;CODE class="p8i6j0f"&gt;simrdimon.specs&lt;/CODE&gt; with &lt;CODE class="p8i6j0f"&gt;uart.specs&lt;/CODE&gt; in linker flags &lt;A id="base-ui-:r20g:" class="wdbi343 wdbi341 _1ibi0s3ec _1ibi0s376" tabindex="0" role="button" href="https://www.nxp.com/docs/en/user-guide/CWARMv8TM.pdf" rel="noreferrer" aria-expanded="false" aria-haspopup="dialog" data-base-ui-click-trigger="" data-label="3" aria-label="Citation 3" target="_blank"&gt;&lt;/A&gt;&lt;/LI&gt;
&lt;/UL&gt;
&lt;HR /&gt;
&lt;H3 class="_9k2iva0 p8i6j0c _1ibi0s314 heading3 _9k2iva1"&gt;DDR Initialization&lt;/H3&gt;
&lt;P class="p8i6j01 paragraph"&gt;For the LX2080A, DDR initialization in a bare-metal context follows the same flow as LX2160A:&lt;/P&gt;
&lt;UL class="p8i6j07 p8i6j02"&gt;
&lt;LI class="p8i6j0a"&gt;&lt;STRONG&gt;QCVS DDRv Tool&lt;/STRONG&gt; (bundled with CodeWarrior) is used to validate DDR and generate &lt;CODE class="p8i6j0f"&gt;ddr_init.c&lt;/CODE&gt;&lt;A id="base-ui-:r20j:" class="wdbi343 wdbi341 _1ibi0s3ec _1ibi0s376" tabindex="0" role="button" href="https://nxp.lightning.force.com/lightning/r/Case/5002p00002UAyoNAAT/view" rel="noreferrer" aria-expanded="false" aria-haspopup="dialog" data-base-ui-click-trigger="" data-label="9" aria-label="Citation 9" target="_blank"&gt;&lt;/A&gt;&lt;/LI&gt;
&lt;LI class="p8i6j0a"&gt;The generated code can be used in your bare-metal startup or as a reference for ATF-based initialization&lt;/LI&gt;
&lt;LI class="p8i6j0a"&gt;DDR PHY firmware (&lt;CODE class="p8i6j0f"&gt;fip_ddr.bin&lt;/CODE&gt;) must be deployed at &lt;CODE class="p8i6j0f"&gt;0x00800000&lt;/CODE&gt; on XSPI flash &lt;A id="base-ui-:r20m:" class="wdbi343 wdbi341 _1ibi0s3ec _1ibi0s376" tabindex="0" role="button" href="https://nxp.lightning.force.com/lightning/r/Case/500Tg00000NKVnRIAX/view" rel="noreferrer" aria-expanded="false" aria-haspopup="dialog" data-base-ui-click-trigger="" data-label="10" aria-label="Citation 10" target="_blank"&gt;&lt;/A&gt;&lt;/LI&gt;
&lt;LI class="p8i6j0a"&gt;GPP DRAM Region #1 starts at &lt;CODE class="p8i6j0f"&gt;0x0000_8000_0000&lt;/CODE&gt;; Region #1 must be included (DPAA/QMAN dependency) &lt;A id="base-ui-:r20p:" class="wdbi343 wdbi341 _1ibi0s3ec _1ibi0s376" tabindex="0" role="button" href="https://nxp.lightning.force.com/lightning/r/Case/500Tg00000I232uIAB/view" rel="noreferrer" aria-expanded="false" aria-haspopup="dialog" data-base-ui-click-trigger="" data-label="11" aria-label="Citation 11" target="_blank"&gt;&lt;/A&gt;&lt;/LI&gt;
&lt;/UL&gt;
&lt;P class="p8i6j01 paragraph"&gt;&lt;STRONG&gt;Linker script DDR configuration example:&lt;/STRONG&gt;&lt;/P&gt;
&lt;DIV class="l8rrz21 _1ibi0s3en" data-ui-element="code-block-container"&gt;
&lt;PRE&gt;&lt;CODE class="markdown-code-ld p8i6j0e hljs language-ld _12n1b832"&gt;PROVIDE (&lt;SPAN class="hljs-strong"&gt;__&lt;SPAN class="hljs-emphasis"&gt;_DDR_&lt;/SPAN&gt;ADDRESS = 0x80000000);
PROVIDE (__&lt;/SPAN&gt;&lt;SPAN class="hljs-emphasis"&gt;_MEMORY_&lt;/SPAN&gt;SIZE = 0x1effffff);
PROVIDE (&lt;SPAN class="hljs-strong"&gt;__&lt;SPAN class="hljs-emphasis"&gt;_CORE_&lt;/SPAN&gt;NUMBER = 0);
PROVIDE (__&lt;/SPAN&gt;&lt;SPAN class="hljs-emphasis"&gt;_START_&lt;/SPAN&gt;RAM&lt;SPAN class="hljs-emphasis"&gt;_ADDRESS = &lt;SPAN class="hljs-strong"&gt;___DDR_ADDRESS + __&lt;/SPAN&gt;_&lt;/SPAN&gt;CORE&lt;SPAN class="hljs-emphasis"&gt;_NUMBER * &lt;SPAN class="hljs-strong"&gt;___MEMORY_SIZE);
&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/CODE&gt;&lt;/PRE&gt;
&lt;/DIV&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;HR /&gt;
&lt;H3 class="_9k2iva0 p8i6j0c _1ibi0s314 heading3 _9k2iva1"&gt;&amp;nbsp;UART on LX2080A — Important Note&lt;/H3&gt;
&lt;P class="p8i6j01 paragraph"&gt;The &lt;STRONG&gt;LX2080A UART controller is NOT backward compatible&lt;/STRONG&gt; with the PrimeCell UART used in LS-series processors. &lt;A id="base-ui-:r212:" class="wdbi343 wdbi341 _1ibi0s3ec _1ibi0s376" tabindex="0" role="button" href="https://community.nxp.com/t5/QorIQ/bd-p/qoriq-grl" rel="noreferrer" aria-expanded="false" aria-haspopup="dialog" data-base-ui-click-trigger="" data-label="12" aria-label="Citation 12" target="_blank"&gt;&lt;/A&gt;The built-in &lt;CODE class="p8i6j0f"&gt;UART_C_Static_Lib_Bare&lt;/CODE&gt; library only supports LS-series UART. For LX2080A UART output, you will need to implement your own driver based on the LX2160A Reference Manual UART register map, or reference SDK UART driver examples. &lt;A id="base-ui-:r215:" class="wdbi343 wdbi341 _1ibi0s3ec _1ibi0s376" tabindex="0" role="button" href="https://nxp.lightning.force.com/lightning/r/Case/5002p00002NDjsuAAD/view" rel="noreferrer" aria-expanded="false" aria-haspopup="dialog" data-base-ui-click-trigger="" data-label="13" aria-label="Citation 13" target="_blank"&gt;&lt;/A&gt;&lt;/P&gt;
&lt;P class="p8i6j01 paragraph"&gt;Community resources for UART on LX2160A/LX2080A:&lt;/P&gt;
&lt;UL class="p8i6j07 p8i6j02"&gt;
&lt;LI class="p8i6j0a"&gt;&lt;SPAN&gt;&lt;A class="_1ibi0s3f5 markdown-link _1ibi0s376" href="https://community.nxp.com/t5/Layerscape/Using-printf-via-UART-in-a-bare-metal-project/m-p/771817" rel="noreferrer" target="_blank"&gt;Using printf via UART in a bare-metal project&lt;/A&gt;&lt;/SPAN&gt;&lt;A id="base-ui-:r218:" class="wdbi343 wdbi341 _1ibi0s3ec _1ibi0s376" tabindex="0" role="button" href="https://community.nxp.com/t5/forums/recentpostspage/post-type/message/user-id/203371" rel="noreferrer" aria-expanded="false" aria-haspopup="dialog" data-base-ui-click-trigger="" data-label="5" aria-label="Citation 5" target="_blank"&gt;&lt;/A&gt;&lt;/LI&gt;
&lt;LI class="p8i6j0a"&gt;&lt;SPAN&gt;&lt;A class="_1ibi0s3f5 markdown-link _1ibi0s376" href="https://community.nxp.com/t5/Layerscape/Compare-bare-metal-built-by-CodeWarrior-and-Realtime-Edge/m-p/1469221" rel="noreferrer" target="_blank"&gt;Compare bare-metal built by CodeWarrior and Realtime Edge&lt;/A&gt;&lt;/SPAN&gt;&lt;A id="base-ui-:r21b:" class="wdbi343 wdbi341 _1ibi0s3ec _1ibi0s376" tabindex="0" role="button" href="https://community.nxp.com/t5/forums/recentpostspage/post-type/message/user-id/203371" rel="noreferrer" aria-expanded="false" aria-haspopup="dialog" data-base-ui-click-trigger="" data-label="5" aria-label="Citation 5" target="_blank"&gt;&lt;/A&gt;&lt;/LI&gt;
&lt;/UL&gt;
&lt;HR /&gt;
&lt;H3 class="_9k2iva0 p8i6j0c _1ibi0s314 heading3 _9k2iva1"&gt;Real-Time Edge Software (Bare-Metal Framework)&lt;/H3&gt;
&lt;P class="p8i6j01 paragraph"&gt;NXP's &lt;STRONG&gt;Real-Time Edge Software&lt;/STRONG&gt; includes a bare-metal framework for LX2160ARDB-REV2 (compatible with LX2080A designs): &lt;A id="base-ui-:r21e:" class="wdbi343 wdbi341 _1ibi0s3ec _1ibi0s376" tabindex="0" role="button" href="https://www.nxp.com/design/design-center/software/development-software/real-time-edge-software:REALTIME-EDGE-SOFTWARE" rel="noreferrer" aria-expanded="false" aria-haspopup="dialog" data-base-ui-click-trigger="" data-label="14" aria-label="Citation 14" target="_blank"&gt;&lt;/A&gt;&lt;/P&gt;
&lt;UL class="p8i6j07 p8i6j02"&gt;
&lt;LI class="p8i6j0a"&gt;U-Boot-based bare-metal framework for low-latency scenarios&lt;/LI&gt;
&lt;LI class="p8i6j0a"&gt;Includes GPIO, IPI, inter-core communication examples&lt;/LI&gt;
&lt;LI class="p8i6j0a"&gt;Available at: &lt;SPAN&gt;&lt;A class="_1ibi0s3f5 markdown-link _1ibi0s376" href="https://www.nxp.com/design/design-center/software/development-software/real-time-edge-software:REALTIME-EDGE-SOFTWARE" rel="noreferrer" target="_blank"&gt;Real-Time Edge Software&lt;/A&gt;&lt;/SPAN&gt;&lt;/LI&gt;
&lt;/UL&gt;
&lt;P class="p8i6j01 paragraph"&gt;Community knowledge base article: &lt;SPAN&gt;&lt;A class="_1ibi0s3f5 markdown-link _1ibi0s376" href="https://community.nxp.com/t5/Layerscape-Knowledge-Base/tkb-p/Layerscape%40tkb" rel="noreferrer" target="_blank"&gt;Application Development based on BareMetal framework in Real-Time Edge Software&lt;/A&gt;&lt;/SPAN&gt;&lt;A id="base-ui-:r21h:" class="wdbi343 wdbi341 _1ibi0s3ec _1ibi0s376" tabindex="0" role="button" href="https://community.nxp.com/t5/forums/recentpostspage/interaction-style/tkb/post-type/thread/board-id/Layerscape/page/2" rel="noreferrer" aria-expanded="false" aria-haspopup="dialog" data-base-ui-click-trigger="" data-label="15" aria-label="Citation 15" target="_blank"&gt;&lt;/A&gt;&lt;/P&gt;
&lt;P class="p8i6j01 paragraph"&gt;&amp;nbsp;&lt;/P&gt;
&lt;P class="p8i6j01 paragraph"&gt;Regards&lt;/P&gt;</description>
      <pubDate>Mon, 17 Aug 2026 16:41:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/Request-for-Bare-Metal-Reference-Code-and-Examples-for-LX2080A/m-p/2405834#M33201</guid>
      <dc:creator>Bio_TICFSL</dc:creator>
      <dc:date>2026-08-17T16:41:06Z</dc:date>
    </item>
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