topic Re: FS26 LDO Off Issue in Other NXP Products

FS26 LDO Off Issue

kjy106906 — Mon, 20 Jul 2026 13:30:02 GMT

Hello

I am using the FS26 and S32K358.

I am using the FS26's VLDO2 as the power supply for the MCU and the FS26's VLDO1 as the power supply for the CAN transceiver.

When the MCU is left in a state of CAN communication, the FS26's VLDO turns OFF, cutting off the MCU's power.

(This occurs randomly, approximately every 1 to 8 hours.)

The VLDO is restored only after the FS26's power supply is cut off and then restored.

This issue occurs on all boards, not just a single one, and does not occur when CAN communication is not in progress.

The status when the issue occurs is as follows:

Vpre 6V O

VDIG 1.6V O

VBOS 5V O

VLDO2 X

VLDO1 X

VCORE X

DFS is disabled via OTP.

I would like to know the current state of the FS26 and what causes this to happen.

Re: FS26 LDO Off Issue

RafaR — Mon, 20 Jul 2026 18:57:43 GMT

Hello kjy106906

Good day!

Is the watchdog enabled?

What are the values of:

FS_STATES
FS_GRL_FLAGS
FS_OVUV_REG_STATUS
M_REG_FLG
M_STATUS immediately after failure?

Have you checked if FS26 is not displaying any UV or OV flags?

Also could you share your M_STATUS?

I hope this information has helped you, please let me know if you need help with anything else.

Have a great day and best of luck.

Re: FS26 LDO Off Issue

kjy106906 — Tue, 21 Jul 2026 12:07:34 GMT

@RafaR

Thank you for the reply.

Unfortunately, the MCU is receiving power from the SBC, but communication is not possible because the VLDO is OFF.

You must cut off and resupplied the board power for the MCU to function.

The watchdog window is infinite.

Re: FS26 LDO Off Issue

RafaR — Mon, 27 Jul 2026 20:54:28 GMT

Hello kjy106906

Good day!

Looks as if the FS26 analog front end is still powered, but the internal power-tree supplying the system has been disabled.

One possible explanation is that a fault has been detected on one of the monitored regulators (VCORE, VLDO1, VLDO2), and the configured reaction disables the regulator outputs. FS26 documentation indicates that regulators can remain disabled after a fault depending on the configured fault-reaction settings.

I hope this information has helped you, please let me know if you need help with anything else.

Have a great day and best of luck.

Re: FS26 LDO Off Issue

kjy106906 — Tue, 28 Jul 2026 02:25:46 GMT

Thank you

@RafaR

This is an important issue, so I would appreciate your response.

I would like to check exactly what state FS26 is in and why it failed.

When the issue occurred, I read the registers using an external tool.

FS26 [FS_STATES:0x17]R:0x0009; CRC[MOSI:0x00; MISO:0x00]
FS26 [M_MIRRORCMD:0x1c]W:0x001d; CRC[MOSI:0x00; MISO:0x00]
FS26 [M_MIRRORDATA:0x1d]R:0x0000; CRC[MOSI:0x00; MISO:0x00]
FS26 [ID_VOTP:0x1D]R:0x00
FS26 [FS_WDW_DURATION:0x0b]W:0xd08b; CRC[MOSI:0x00; MISO:0x00]
FS26 [FS_NOT_WDW_DURATION:0x0c]W:0x2f74; CRC[MOSI:0x00; MISO:0x00]
FS26 [M_VSUP_FLG:0x07]R:0x0000; CRC[MOSI:0x00; MISO:0x00]
FS26 [M_VSUP_MSK:0x08]R:0x0000; CRC[MOSI:0x00; MISO:0x00]
FS26 [M_REG_FLG:0x05]R:0x0000; CRC[MOSI:0x00; MISO:0x00]
FS26 [M_REG_MSK:0x06]R:0x0000; CRC[MOSI:0x00; MISO:0x00]
FS26 [M_TSD_FLG:0x03]R:0x0000; CRC[MOSI:0x00; MISO:0x00]
FS26 [M_TSD_MSK:0x04]R:0x0000; CRC[MOSI:0x00; MISO:0x00]
FS26 [M_WIO_FLG:0x09]R:0x0000; CRC[MOSI:0x00; MISO:0x00]
FS26 [M_WIO_MSK:0x0a]R:0x0000; CRC[MOSI:0x00; MISO:0x00]
FS26 [M_STATUS:0x02]R:0x5020; CRC[MOSI:0x00; MISO:0x00]
FS26 [M_COM_FLG:0x0b]R:0x0005; CRC[MOSI:0x00; MISO:0x00]
FS26 [M_COM_MSK:0x0c]R:0x0000; CRC[MOSI:0x00; MISO:0x00]
FS26 [FS_OVUV_REG_STATUS:0x10]R:0x1544; CRC[MOSI:0x00; MISO:0x00]
FS26 [FS_INTB_MASK:0x16]R:0x0000; CRC[MOSI:0x00; MISO:0x00]
FS26 [FS_DIAG_SAFETY1:0x14]R:0x03c3; CRC[MOSI:0x00; MISO:0x00]
FS26 [FS_DIAG_SAFETY2:0x15]R:0x0010; CRC[MOSI:0x00; MISO:0x00]
FS26 [FS_SAFE_IOS_1:0x12]R:0xf000; CRC[MOSI:0x00; MISO:0x00]
FS26 [FS_STATES:0x17]R:0x0009; CRC[MOSI:0x00; MISO:0x00]
FS26 [FS_GRL_FLAGS:0x00]R:0x5000; CRC[MOSI:0x00; MISO:0x00]
FS26 [M_DEVICEID:0x00]R:0x65d8; CRC[MOSI:0x00; MISO:0x00]
FS26 [M_PROGID:0x01]R:0x0105; CRC[MOSI:0x00; MISO:0x00]
FS26 [M_STATUS:0x02]R:0x5020; CRC[MOSI:0x00; MISO:0x00]
FS26 [M_TSD_FLG:0x03]R:0x0000; CRC[MOSI:0x00; MISO:0x00]
FS26 [M_TSD_MSK:0x04]R:0x0000; CRC[MOSI:0x00; MISO:0x00]
FS26 [M_REG_FLG:0x05]R:0x0000; CRC[MOSI:0x00; MISO:0x00]
FS26 [M_REG_MSK:0x06]R:0x0000; CRC[MOSI:0x00; MISO:0x00]
FS26 [M_VSUP_FLG:0x07]R:0x0000; CRC[MOSI:0x00; MISO:0x00]
FS26 [M_VSUP_MSK:0x08]R:0x0000; CRC[MOSI:0x00; MISO:0x00]
FS26 [M_WIO_FLG:0x09]R:0x0000; CRC[MOSI:0x00; MISO:0x00]
FS26 [M_WIO_MSK:0x0a]R:0x0000; CRC[MOSI:0x00; MISO:0x00]
FS26 [M_COM_FLG:0x0b]R:0x0005; CRC[MOSI:0x00; MISO:0x00]
FS26 [M_COM_MSK:0x0c]R:0x0000; CRC[MOSI:0x00; MISO:0x00]
FS26 [M_SYS_CFG:0x0d]R:0x0001; CRC[MOSI:0x00; MISO:0x00]
FS26 [M_TSD_CFG:0x0e]R:0x0000; CRC[MOSI:0x00; MISO:0x00]
FS26 [M_REG_CFG:0x0f]R:0x0002; CRC[MOSI:0x00; MISO:0x00]
FS26 [M_WIO_CFG:0x10]R:0x0202; CRC[MOSI:0x00; MISO:0x00]
FS26 [M_REG_CTRL1:0x11]R:0x0000; CRC[MOSI:0x00; MISO:0x00]
FS26 [M_AMUX_CTRL:0x13]R:0x0000; CRC[MOSI:0x00; MISO:0x00]
FS26 [M_LDT_CFG1:0x14]R:0x0000; CRC[MOSI:0x00; MISO:0x00]
FS26 [M_LDT_CFG2:0x15]R:0x0000; CRC[MOSI:0x00; MISO:0x00]
FS26 [M_LDT_CFG3:0x16]R:0x0000; CRC[MOSI:0x00; MISO:0x00]
FS26 [M_LDT_CTRL:0x17]R:0x0000; CRC[MOSI:0x00; MISO:0x00]
FS26 [M_MEMORY0:0x18]R:0x0000; CRC[MOSI:0x00; MISO:0x00]
FS26 [M_MEMORY1:0x19]R:0x0000; CRC[MOSI:0x00; MISO:0x00]
FS26 [FS_GRL_FLAGS:0x00]R:0x5000; CRC[MOSI:0x00; MISO:0x00]
FS26 [FS_WDW_DURATION:0x0b]R:0xd08b; CRC[MOSI:0x00; MISO:0x00]
FS26 [FS_NOT_WDW_DURATION:0x0c]R:0x2144; CRC[MOSI:0x00; MISO:0x00]
FS26 [FS_WD_TOKEN:0x0e]R:0x5ab2; CRC[MOSI:0x00; MISO:0x00]
FS26 [FS_ABIST_ON_DEMAND:0x0f]R:0x0040; CRC[MOSI:0x00; MISO:0x00]
FS26 [FS_OVUV_REG_STATUS:0x10]R:0x1544; CRC[MOSI:0x00; MISO:0x00]
FS26 [FS_SAFE_IOS_1:0x12]R:0xf000; CRC[MOSI:0x00; MISO:0x00]
FS26 [FS_SAFE_IOS_2:0x13]R:0x035f; CRC[MOSI:0x00; MISO:0x00]
FS26 [FS_DIAG_SAFETY1:0x14]R:0x03c3; CRC[MOSI:0x00; MISO:0x00]
FS26 [FS_DIAG_SAFETY2:0x15]R:0x0010; CRC[MOSI:0x00; MISO:0x00]
FS26 [FS_INTB_MASK:0x16]R:0x0000; CRC[MOSI:0x00; MISO:0x00]
FS26 [FS_STATES:0x17]R:0x0009; CRC[MOSI:0x00; MISO:0x00]
FS26 [FS_LP_REQ:0x18]R:0x0000; CRC[MOSI:0x00; MISO:0x00]
FS26 [FS_LDT_LPSEL:0x19]R:0x0000; CRC[MOSI:0x00; MISO:0x00]

I am attaching the waveform when an issue occurs.

Blue VSUP / Red VBOS / Green RSTB / Yellow VDIG

Blue VSUP / Red VPre / Green Vcore / Yellow RSTB

Re: FS26 LDO Off Issue

kjy106906 — Tue, 28 Jul 2026 03:47:00 GMT

+ waveform

Blue VLDO2 / Red Vpre/ Green VLDO1 / Yellow VCore

Re: FS26 LDO Off Issue

db16122 — Tue, 28 Jul 2026 04:05:31 GMT

Please refer to PMIC initiailization process for debug. AN13431
NXP PMIC solution for TI TMS570 series MCU should be helpful