Other NXP ProductsのトピックRe: TJA1120A RGMII Auto-Ethernet

TJA1120A RGMII Auto-Ethernet

vikyhre — Tue, 07 Apr 2026 08:52:44 GMT

We are working on TJA1120A RGMII Auto-Ethernet on our Custom Board based on TI AM62A7

Kindly help us with how to enable this interface on Yocto Linux

We have tried following DTS node format as in https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/net/nxp%2Ctja11xx.yaml

But driver didnt probe on Kernel dmesg

We understand that this PHY has vendor ID D001B:B031

We have also enabled CONFIG_NXP_TJA11XX_PHY in kernel config CONFIG_NXP_C45_TJA11XX_PHY

Re: TJA1120A RGMII Auto-Ethernet

PavelL — Wed, 08 Apr 2026 07:04:43 GMT

Hello @vikyhre ,

To narrow this down, could you please share:

1) Does U-Boot detect the PHY on the MDIO bus at the expected address? (e.g. output of “mdio list” / “mii info”)
2) Please share the relevant DTS snippets for the CPSW port node and the MDIO/PHY node (phy-handle, phy-mode, PHY reg/address), plus the boot log lines related to MDIO/PHY init:
dmesg | egrep -i "mdio|cpsw|phy|tja|nxp"

With these two items we can quickly determine whether the PHY is not visible on MDIO (HW/pinmux/reset/address) or if it’s a DT binding/reference issue.

Best regards,

Pavel

Re: TJA1120A RGMII Auto-Ethernet

vikyhre — Wed, 01 Jul 2026 07:54:06 GMT

We are using AM62A7 based iWave SoM, we didnt touch the u-boot/bootloader firmware residing in the eMMC as of now

U-Boot SPL 2023.04-g2b8a667ace (May 24 2024 - 11:27:05 +0000) SYSFW ABI: 3.1 (firmware rev 0x0009 '9.1.8--v09.01.08 (Kool Koala)') am62a_init: board_init_f done SPL initial stack usage: 17040 bytes am62a_init: spl_boot_device: devstat = 0x374b bootmedia = 0x9 bootindex = 0 Trying to boot from MMC1 am62a_init: spl_boot_device: devstat = 0x374b bootmedia = 0x9 bootindex = 0 Authentication passed am62a_init: spl_boot_device: devstat = 0x374b bootmedia = 0x9 bootindex = 0 Authentication passed am62a_init: spl_boot_device: devstat = 0x374b bootmedia = 0x9 bootindex = 0 Authentication passed am62a_init: spl_boot_device: devstat = 0x374b bootmedia = 0x9 bootindex = 0 Authentication passed am62a_init: spl_boot_device: devstat = 0x374b bootmedia = 0x9 bootindex = 0 Authentication passed Starting ATF on ARM64 core... NOTICE: BL31: v2.9(release):d7a7135d3-dirty NOTICE: BL31: Built : 09:34:15, Aug 24 2023 U-Boot SPL 2023.04-g2b8a667ace (May 24 2024 - 11:27:05 +0000) SYSFW ABI: 3.1 (firmware rev 0x0009 '9.1.8--v09.01.08 (Kool Koala)') am62a_init: board_init_f done am62a_init: spl_boot_device: devstat = 0x374b bootmedia = 0x9 bootindex = 0 Trying to boot from MMC1 am62a_init: spl_boot_device: devstat = 0x374b bootmedia = 0x9 bootindex = 0 Authentication passed am62a_init: spl_boot_device: devstat = 0x374b bootmedia = 0x9 bootindex = 0 Authentication passed U-Boot 2023.04-g2b8a667ace (May 24 2024 - 11:27:05 +0000) SoC: AM62AX SR1.0 HS-FS Model: iW-RainboW-G55M-TI-AM62AX OSM DRAM: 2 GiB Core: 60 devices, 29 uclasses, devicetree: separate MMC: mmc@fa10000: 0, mmc@fa00000: 1 Loading Environment from nowhere... OK In: serial@2800000 Out: serial@2800000 Err: serial@2800000 Board Info: BSP Version : iW-PRHAZ-SC-01-R2.0-REL1.0-Linux6.1.46 SOM Version : iW-PRHAZ-AP-01-R2.0 Net: eth0: ethernet@8000000port@1 Hit any key to stop autoboot: 0 iWave-G55M > mdio list mdio@f00: ethernet@8000000port@1: 4 - Generic PHY <--> ethernet@8000000port@1 iWave-G55M > mii info

U-Boot firmware is something we didnt change, we just boot our Linux from SD-Card

I have attached k3-am62a7-iwg55m.dtsi, where both ethernets eth0,eth1 are disabled

&cpsw3g { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&main_rgmii1_pins_default>, <&main_rgmii2_pins_default>; cpts@3d000 { /* MAP HW3_TS_PUSH to GENF1 */ ti,pps = <2 1>; }; }; &cpsw_port1 { status = "disabled"; phy-mode = "rgmii-rxid"; phy-handle = <&cpsw3g_phy0>; }; &cpsw_port2 { status = "disabled"; phy-mode = "rgmii-rxid"; phy-handle = <&cpsw3g_phy1>; }; &cpsw3g_mdio { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&main_mdio1_pins_default>; cpsw3g_phy0: ethernet-phy@0 { reg = <4>; adi,rx-internal-delay-ps = <2000>; }; cpsw3g_phy1: ethernet-phy@1 { reg = <5>; qca,disable-smarteee; vddio-supply = <&vddio0>; vddio0: vddio-regulator { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; }; };

In k3-am62a7-iwg55s-prgjj-41.dts, i enabled both eth0 and eth1 with appropiate DT entries

&cpsw_port1 and &cpsw3g_phy0 corresponds to our Auto-Ethernet

&cpsw_port1 { status = "okay"; phy-mode = "rgmii"; }; &cpsw_port2 { status = "okay"; phy-mode = "rgmii"; }; &cpsw3g_phy0 { //compatible = "ethernet-phy-id001b.b031", "ethernet-phy-ieee802.3-c45"; compatible = "ethernet-phy-id001b.b030"; nxp,rmii-refclk-in; reg = <4>; }; &cpsw3g_phy1 { compatible = "ethernet-phy-id0022.1620"; reg = <0>; txc-skew-ps = <900>; rxc-skew-ps = <900>; rxd0-skew-ps = <420>; rxd1-skew-ps = <420>; rxd2-skew-ps = <420>; rxd3-skew-ps = <420>; txd0-skew-ps = <420>; txd1-skew-ps = <420>; txd2-skew-ps = <420>; txd3-skew-ps = <420>; rxdv-skew-ps = <420>; txen-skew-ps = <420>; };

Here, my PHY TJA1120A has PHY Identification Register 1: 1B and PHY Identification Register 2: B030.
So appropiate driver should be compatible = "ethernet-phy-id001b.b030"

Response for dmesg | egrep -i "mdio|cpsw|phy|tja|nxp"

root@am62ax-iwg55m-osm:/sys/class/hwmon/hwmon0# dmesg | egrep -i "mdio|cpsw|phy|tja|nxp" [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034] [ 0.000000] arch_timer: cp15 timer(s) running at 200.00MHz (phys). [ 1.349271] davinci_mdio 8000f00.mdio: davinci mdio revision 9.7, bus freq 1000000 [ 1.358577] davinci_mdio 8000f00.mdio: phy[0]: device 8000f00.mdio:00, driver Micrel KSZ9031 Gigabit PHY [ 1.368066] davinci_mdio 8000f00.mdio: phy[4]: device 8000f00.mdio:04, driver unknown [ 1.375925] am65-cpsw-nuss 8000000.ethernet: initializing am65 cpsw nuss version 0x6BA01103, cpsw version 0x6BA81103 Ports: 3 quirks:00000006 [ 1.388839] am65-cpsw-nuss 8000000.ethernet: Use random MAC address [ 1.395108] am65-cpsw-nuss 8000000.ethernet: initialized cpsw ale version 1.5 [ 1.402236] am65-cpsw-nuss 8000000.ethernet: ALE Table size 512 [ 1.412875] am65-cpsw-nuss 8000000.ethernet: CPTS ver 0x4e8a010c, freq:500000000, add_val:1 pps:1 [ 1.422952] am65-cpsw-nuss 8000000.ethernet: set new flow-id-base 19 [ 6.876699] am65-cpsw-nuss 8000000.ethernet eth1: PHY [8000f00.mdio:00] driver [Micrel KSZ9031 Gigabit PHY] (irq=POLL) [ 6.893353] am65-cpsw-nuss 8000000.ethernet eth1: configuring for phy/rgmii link mode [ 6.937861] am65-cpsw-nuss 8000000.ethernet eth0: validation of rgmii with support 00000000,00000000,00006280 and advertisement 00000000,00000000,00002280 failed: -EINVAL

I have also attached dmesg

Re: TJA1120A RGMII Auto-Ethernet

PavelL — Thu, 02 Jul 2026 12:39:59 GMT

Hello @vikyhre ,

Please note that Community threads are actively monitored for 7 days after the last post. After this period, we only receive subscription email notifications for further updates, and such notifications can occasionally be missed.

If you need additional assistance in the future, we recommend creating a new Community query or supporting ticket https://support.nxp.com/s/?language=en_US .

Anyway, here's my analyses.

Please note that the Linux commands below are provided as suggested diagnostic checks. Since I do not have access to your exact build and runtime environment, I cannot directly verify them on your setup and minor adaptations may be needed depending on your system configuration.

The following thread might be useful as a reference:

No packet transmission with TJA1120 and i.MX8 Eval hardware

From the log, the MDIO access itself seems to be working, because Linux detects two PHY devices on the MDIO bus:

[ 1.358577] davinci_mdio 8000f00.mdio: phy[0]: device 8000f00.mdio:00, driver Micrel KSZ9031 Gigabit PHY
[ 1.368066] davinci_mdio 8000f00.mdio: phy[4]: device 8000f00.mdio:04, driver unknown

So the TJA1120A appears to be visible at MDIO address 4, but it is not bound to the NXP C45 TJA11xx PHY driver yet. This is likely why the CPSW port later fails during RGMII validation.

As a first step, please try updating the TJA1120A PHY node to explicitly specify Clause 45:

&cpsw_port1 {
    status = "okay";
    phy-mode = "rgmii";      /* or rgmii-id / rgmii-rxid / rgmii-txid depending on your board delay design */
    phy-handle = <&cpsw3g_phy0>;
};
 
&cpsw3g_phy0 {
    compatible = "ethernet-phy-id001b.b030", "ethernet-phy-ieee802.3-c45";
    reg = <4>;
    status = "okay";
};

Also, please remove this property from the TJA1120A node:

 nxp,rmii-refclk-in;

This property is related to RMII reference clock configuration and should not be used for your RGMII TJA1120A setup.

After rebuilding and booting with the updated DTB, please check whether the driver is attached, for example:

dmesg | egrep -i "mdio|cpsw|phy|tja|nxp"

The expected result is that the PHY at address 4 is no longer shown as driver unknown, but is attached to the NXP C45 TJA11xx/TJA1120 driver.

If it still remains driver unknown, please also confirm that the running kernel really contains the driver support:

zcat /proc/config.gz | egrep "NXP.*TJA|C45|PHYLIB"
find /lib/modules/$(uname -r) -name "*tja*"

Best regards,

Pavel