IMX8MP secondary image boot

djordje_nod — Mon, 22 Jun 2026 11:25:04 GMT

Does IMG_CNTN_SET1_OFFSET secondary image boot (RM 6.1.6.2) work for ECSPI ("SPI") NOR boot on i.MX8MP, or only for FlexSPI NOR (and SD/eMMC)? Table 6-28 lists "SPI" and "FlexSPI NOR" as separate boot devices, and the secondary-offset valid values are stated only "for FlexSPI NOR boot."

Re: IMX8MP secondary image boot

Oswalag — Mon, 29 Jun 2026 16:31:20 GMT

Hello,

Your understanding is wrong, the IMG_CNTN_SET1_OFFSET secondary image boot also work for SPI devices, only with a different offset:

For FlexSPI = the valid values are: 0, 1, 2, 3, 4, 5, 6, and 7

For SPI = Secondary boot is disabled if fuse value is bigger than 10, n = fuse value bigger than
10.
• n == 0: Offset = 4MB
• n == 2: Offset = 1MB
• Others & n <= 10 : Offset = 1MB*2^n

Oswalag_0-1782750547759.png

Other NXP ProductsのトピックIMX8MP secondary image boot

IMX8MP secondary image boot

Re: IMX8MP secondary image boot