topic Re: PT2000 CLK problem on FRDMPT2000EVM in Other NXP Products

PT2000 CLK problem on FRDMPT2000EVM

Gelby — Thu, 21 May 2026 13:30:57 GMT

Hello, I'm using the FRDMPT2000EVM connected to my microcontroller board.

The connections betwheen the two boards are:

Reset, DRVEN, SCLK, MISO, MOSI, CS, VCCIO(3.3V), VCC5, CLK.

I'm sure the SPI communication is working ( I can read / write registers).

I verified with a scope meter on the CLK jumper(that is closed) on the eval board that the CLK signal is as per the specification (frequency 1MHz, duty cycle 50 %, voltage level 3.3V) but when I read the mainBackupClockStatus register (address 0x1A8) the bit 0 (loss_of_clock) is settled stating the external clock is not recognized, but I'm sure the clock is correct and correctly connected, I tried also to set the bit switch_to_clock_pin in the same register without success, please help me, where is the mistake?

Regards

Re: PT2000 CLK problem on FRDMPT2000EVM

RafaR — Thu, 21 May 2026 23:08:15 GMT

Hello alessandrocorti

Good day!

The PLL is locked about 25 us after the external CLK is enabled

Switch_to_clock_pin: this bit (active on rising edge) is used to provide a way to reset the loss of clock condition. If this bit is set during a loss of clock condition it is reset as soon as the clock manager switches the PLL input to the external reference. If this bit sets while there is no loss of clock, the bit resets immediately without any effect.

Could you confirm that the PLL does change when you try to perform the switch_to_clock_pin?

After the reset, try with a delay. Let the clock monitor stabilize.

I also recommend that you reread chapter 7.4.3 Clock monitor, flash enable, and DrvEn of the datasheet

I hope this information has helped you, please let me know if you need help with anything else.

Have a great day and best of luck.

Re: PT2000 CLK problem on FRDMPT2000EVM

Gelby — Fri, 22 May 2026 12:52:04 GMT

Thank you RafaR for you reply.

I tought that the PT2000 chip was able to switch alone to the external clock without the need to do manually the swith by the user software.

Anyway, as I stated before, I was trying to switch manually but after that, all the next registers accesses returned 0xAAAC like error code.

Today I tried changing the logic behind and hopefully I found the bug in my code, I had to add a 50 us delay betwheen a write register access and a read register access, the new function that seems to work is now:

int PT2000ClockCheck(PT2000_Device *PT2000Device)

{

PT2000Device->extClkIsOk = PT2000MissingClkBitCheck(PT2000Device);

while( !PT2000Device->extClkIsOk )

{

PT2000Device->BkpClkStatReg.B.SwitchToClkPin = 1;

PT2000WriteRegister(PT2000Device, mainBackupClockStatus, PT2000Device->BkpClkStatReg.U);

delayus(50)); // Wait 50 micro seconds

PT2000Device->extClkIsOk = PT2000MissingClkBitCheck(PT2000Device);

}

return 0;

}

where the function PT2000MissingClkBitCheck is:

boolean PT2000MissingClkBitCheck(PT2000_Device *PT2000Device)

{

boolean CLKCheckResult = TRUE;

// Check CLK 1MHz

PT2000TransferData(PT2000Device, SpiCmdWrite, selectionRegister, COMMON_PAGE); // Set common page

PT2000Device->BkpClkStatReg.U = PT2000TransferData(PT2000Device, SpiCmdRead, mainBackupClockStatus, 0x00); // Read backup clock status register

if( PT2000Device->BkpClkStatReg.B.LossOfClk )

{

CLKCheckResult = FALSE; // If 1MHz CLK not there set results to 0

}

return CLKCheckResult;

}

Without the delayus(50) doesn't work.

Do you confirm I need that delay?

Is this correct or to be more safety must I set time delay longer?

In general, must I insert a delay betwheen two successive access on a register?

Best Regards

Re: PT2000 CLK problem on FRDMPT2000EVM

RafaR — Fri, 22 May 2026 18:09:08 GMT

Hello alessandrocorti

Good day!

Do you confirm I need that delay?

Yes, it's perfect that you implemented it.

Is this correct or to be more safety must I set time delay longer?

More than 50 us is excessive, I think. You could give it another 20 us if you want to be sure; you shouldn't have any problems with 50 us.

In general, must I insert a delay betwheen two successive access on a register?

In general, this shouldn't be necessary; this delay was to give the PT2000 time to stabilize with the clock.

I hope this information has helped you, please let me know if you need help with anything else.

Have a great day and best of luck.

Re: PT2000 CLK problem on FRDMPT2000EVM

Gelby — Mon, 25 May 2026 07:30:23 GMT

Hello RafaR,

thank you for your reply, just the last question because I have yet a doubt,

In general must I every time switch manually to the external clock pin or should the PT2000 switch automatically when the external clock is recognized?

Thanks

Regards.

Re: PT2000 CLK problem on FRDMPT2000EVM

RafaR — Mon, 25 May 2026 15:55:23 GMT

Hello alessandrocorti

Good day!

If external clock fails: device automatically switches to backup clock

If external clock comes back: device usually does NOT auto-return

You must switch again manually

I hope this information has helped you, please let me know if you need help with anything else.

Have a great day and best of luck.

Re: PT2000 CLK problem on FRDMPT2000EVM

Gelby — Tue, 26 May 2026 06:16:53 GMT

Hello RafaR,

I understand what you say.

I think In my case the problem is that at the startup the external clock is not recognized by the PT2000 because the microcontroller board that feed the clock is not powered at the same time the PT2000 is, so the PT2000 startup first without external clock, then the microcontroller begin to feed the clock but at this moment I must switch the clock manually.

I hope in the final board with the PT2000 and the microcontroller powered up at the same time, the PT2000 could recognize the clock at the startup phase.

Thanks again and Best Regards