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    <title>topic iMX95 M7 Boot issue in Other NXP Products</title>
    <link>https://community.nxp.com/t5/Other-NXP-Products/iMX95-M7-Boot-issue/m-p/2346213#M31503</link>
    <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I am trying to load a binary onto the Cortex-M7 core on a Toradex iMX95 Verdin module while Linux has not yet been initialized (i.e., at the U-Boot stage). During this process, I am attempting to load one of the example projects located in the eMMC.&lt;/P&gt;&lt;P&gt;The method I am following is based on the section referenced in UG10163, i.MX Linux User's Guide, which I have mentioned below. However, when I follow the instructions, the A55 core (running U-Boot) resets, and there is no observable change on the M7 side.&lt;/P&gt;&lt;P&gt;The address range provided in the example corresponds to the M7’s ITCM region. When I execute the bootaux command using DRAM instead, the A55 core does not reset; however, there is still no observable activity on the M7 side.&lt;/P&gt;&lt;P&gt;I suspect that the reset behavior may be related to the TRDC configuration performed by the M33 core. Could you please assist me with this issue?&lt;/P&gt;&lt;P&gt;The UBOOT version is 202504.&lt;/P&gt;&lt;P&gt;SM Version = Build 646, Commit 707569f4&lt;BR /&gt;SM Config = mx95evk, mSel =0&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="danielchen_0-1755670059626.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/381421iCBBDA4CD69251A8D/image-size/medium?v=v2&amp;amp;px=400" role="button" title="danielchen_0-1755670059626.png" alt="danielchen_0-1755670059626.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt; &lt;/P&gt;</description>
    <pubDate>Tue, 07 Apr 2026 09:55:36 GMT</pubDate>
    <dc:creator>samael3437</dc:creator>
    <dc:date>2026-04-07T09:55:36Z</dc:date>
    <item>
      <title>iMX95 M7 Boot issue</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/iMX95-M7-Boot-issue/m-p/2346213#M31503</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I am trying to load a binary onto the Cortex-M7 core on a Toradex iMX95 Verdin module while Linux has not yet been initialized (i.e., at the U-Boot stage). During this process, I am attempting to load one of the example projects located in the eMMC.&lt;/P&gt;&lt;P&gt;The method I am following is based on the section referenced in UG10163, i.MX Linux User's Guide, which I have mentioned below. However, when I follow the instructions, the A55 core (running U-Boot) resets, and there is no observable change on the M7 side.&lt;/P&gt;&lt;P&gt;The address range provided in the example corresponds to the M7’s ITCM region. When I execute the bootaux command using DRAM instead, the A55 core does not reset; however, there is still no observable activity on the M7 side.&lt;/P&gt;&lt;P&gt;I suspect that the reset behavior may be related to the TRDC configuration performed by the M33 core. Could you please assist me with this issue?&lt;/P&gt;&lt;P&gt;The UBOOT version is 202504.&lt;/P&gt;&lt;P&gt;SM Version = Build 646, Commit 707569f4&lt;BR /&gt;SM Config = mx95evk, mSel =0&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="danielchen_0-1755670059626.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/381421iCBBDA4CD69251A8D/image-size/medium?v=v2&amp;amp;px=400" role="button" title="danielchen_0-1755670059626.png" alt="danielchen_0-1755670059626.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt; &lt;/P&gt;</description>
      <pubDate>Tue, 07 Apr 2026 09:55:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/iMX95-M7-Boot-issue/m-p/2346213#M31503</guid>
      <dc:creator>samael3437</dc:creator>
      <dc:date>2026-04-07T09:55:36Z</dc:date>
    </item>
    <item>
      <title>Re: iMX95 M7 Boot issue</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/iMX95-M7-Boot-issue/m-p/2347783#M31532</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/261075"&gt;@samael3437&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;I hope you are doing very well.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Please refer to the below link:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://docs.nxp.com/bundle/AN14748/page/topics/generate_bootable_image_for_running_m7_from_itcm.html" target="_blank"&gt;https://docs.nxp.com/bundle/AN14748/page/topics/generate_bootable_image_for_running_m7_from_itcm.html&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;There is explained the process to make a booteable image for run Cortex M7 from ITCM.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;At moment, bootaux and rproc are not fully supported.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;Salas.&lt;/P&gt;</description>
      <pubDate>Thu, 09 Apr 2026 01:53:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/iMX95-M7-Boot-issue/m-p/2347783#M31532</guid>
      <dc:creator>Manuel_Salas</dc:creator>
      <dc:date>2026-04-09T01:53:16Z</dc:date>
    </item>
    <item>
      <title>Re: iMX95 M7 Boot issue</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/iMX95-M7-Boot-issue/m-p/2347884#M31538</link>
      <description>&lt;P&gt;Hello &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/203368"&gt;@Manuel_Salas&lt;/a&gt;,&lt;/P&gt;&lt;P&gt;Thank you very much for your response.&lt;/P&gt;&lt;P&gt;I have previously reviewed the method provided in the link you shared. However, according to my development setup, I need to load the binary to the M7 using U-Boot. You mentioned that bootaux is not fully supported—could you provide more details on the current limitations of bootaux?&lt;/P&gt;&lt;P&gt;Additionally, in the topic below, &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/369"&gt;@danielchen&lt;/a&gt; from the NXP TechSupport team mentions that he was able to load one of the example project binaries located in eMMC to the M7 using bootaux. As I mentioned earlier, if there is no specific issue with bootaux, I suspect that the reset behavior I am experiencing might be related to the TRDC configuration. It is possible that the A55 does not have write access to the M7's ITCM region. I would appreciate it if you could clarify this matter.&lt;/P&gt;&lt;P&gt;Thank you in advance for your support.&lt;BR /&gt;&lt;BR /&gt;&lt;A href="https://community.nxp.com/t5/Other-NXP-Products/Free-RTOS-on-M33-core-of-the-i-mx95/td-p/2151421" target="_blank"&gt;https://community.nxp.com/t5/Other-NXP-Products/Free-RTOS-on-M33-core-of-the-i-mx95/td-p/2151421&lt;/A&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 09 Apr 2026 05:00:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/iMX95-M7-Boot-issue/m-p/2347884#M31538</guid>
      <dc:creator>samael3437</dc:creator>
      <dc:date>2026-04-09T05:00:03Z</dc:date>
    </item>
    <item>
      <title>Re: iMX95 M7 Boot issue</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/iMX95-M7-Boot-issue/m-p/2380803#M32567</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;Any updates on this topic? I have the same issue. Somehow Cortex A has no access to TCM, and Cortex M7 crashes when release to 0x9000 0000. prepaux, stopaux and bootaux did not seem to do anything, when status is checked with SM&lt;/P&gt;</description>
      <pubDate>Fri, 12 Jun 2026 11:24:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/iMX95-M7-Boot-issue/m-p/2380803#M32567</guid>
      <dc:creator>TiborJ</dc:creator>
      <dc:date>2026-06-12T11:24:36Z</dc:date>
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