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    <title>Other NXP ProductsのトピックRe: lpuart12</title>
    <link>https://community.nxp.com/t5/Other-NXP-Products/lpuart12/m-p/2330936#M31319</link>
    <description>&lt;P&gt;Hello &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/205947"&gt;@Ajas&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;After investigating further, this behavior is to be expected, since the SION bit is not designed to be operated with the UART module.&lt;/P&gt;
&lt;P&gt;If this functionality is required for your application, you have two options depending on your requirements:&lt;/P&gt;
&lt;P&gt;-If you need to see the UART frame at the same time that you are receiving, you can use another pin configured as a GPIO and monitor the RX signal from there.&lt;BR /&gt;-If you need to monitor it when you are not receiving a frame. Temporarily reconfigure the RX pin as a GPIO when you need to read its physical logic level and then switch it back to UART RX.&lt;/P&gt;
&lt;P&gt;BR&lt;BR /&gt;Habib&lt;/P&gt;</description>
    <pubDate>Wed, 11 Mar 2026 22:54:48 GMT</pubDate>
    <dc:creator>Habib_MS</dc:creator>
    <dc:date>2026-03-11T22:54:48Z</dc:date>
    <item>
      <title>lpuart12</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/lpuart12/m-p/2318977#M31221</link>
      <description>&lt;P&gt;Hi everyone,&lt;/P&gt;&lt;P&gt;I am working on an &lt;STRONG&gt;i.MX RT1170&lt;/STRONG&gt; and I’m trying to read the logic state of the RXD pin while the LPUART12 is active.&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;My Setup:&lt;/STRONG&gt;&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;&lt;P&gt;&lt;STRONG&gt;Pins used:&lt;/STRONG&gt; R6 and N6 (configured as LPUART12).&lt;/P&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P&gt;&lt;STRONG&gt;Target Pin:&lt;/STRONG&gt; N6 (GPIO_LPSR_01), which I want to monitor as an input.&lt;/P&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P&gt;&lt;STRONG&gt;IOMUX Configuration:&lt;/STRONG&gt; I have set the MUX_MODE to &lt;STRONG&gt;ALT6&lt;/STRONG&gt; (LPUART12_RXD) and I have explicitly enabled the &lt;STRONG&gt;SION&lt;/STRONG&gt; bit (Software Input On) .&lt;/P&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P&gt;&lt;STRONG&gt;UART Status:&lt;/STRONG&gt; The LPUART12 is communicating correctly (TX/RX works).&lt;/P&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&lt;STRONG&gt;The Issue:&lt;/STRONG&gt; Even with the &lt;STRONG&gt;SION&lt;/STRONG&gt; bit set, I am unable to get the pin's logic level by reading the GPIO registers. The value is always 0 (output is idle state at logical value 1). I have tried reading from:&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;&lt;P&gt;GPIO12-&amp;gt;PSR (Bit 1)&lt;/P&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P&gt;GPIO6-&amp;gt;PSR (Bit 1)&lt;/P&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P&gt;RGPIO_LPSR-&amp;gt;PDIR (Bit 1)&lt;/P&gt;&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;In all cases, the value remains static (usually 0).&lt;/P&gt;</description>
      <pubDate>Tue, 17 Feb 2026 10:54:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/lpuart12/m-p/2318977#M31221</guid>
      <dc:creator>Ajas</dc:creator>
      <dc:date>2026-02-17T10:54:49Z</dc:date>
    </item>
    <item>
      <title>Re: lpuart12</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/lpuart12/m-p/2320788#M31229</link>
      <description>&lt;P&gt;Hello &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/205947"&gt;@Ajas&lt;/a&gt;,&lt;BR /&gt;Since you want to read the logic value of a pin configured as an input, you must check the corresponding bit in the GPIO_PSR[x] register, as mentioned in the &lt;A href="https://www.nxp.com/docs/en/application-note/AN5078.pdf" target="_self"&gt;AN5078&lt;/A&gt;, specifically in Chapter 8.2.1 called “GPIO usage setting”.&lt;BR /&gt;I highly recommend reviewing this app note, as it provides very useful information about how GPIO pins operate. It also explains the SION feature. You can find this explanation in Chapter 6.3.&lt;BR /&gt;BR&lt;BR /&gt;Habib&lt;/P&gt;</description>
      <pubDate>Fri, 20 Feb 2026 17:18:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/lpuart12/m-p/2320788#M31229</guid>
      <dc:creator>Habib_MS</dc:creator>
      <dc:date>2026-02-20T17:18:05Z</dc:date>
    </item>
    <item>
      <title>Re: lpuart12</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/lpuart12/m-p/2324880#M31268</link>
      <description>&lt;P class=""&gt;&lt;SPAN&gt;Hello,&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN&gt;Thank you for your reply.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN&gt;However, reading the GPIO_PSR register has already been tested and was explicitly mentioned in my original question.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN&gt;As described, I tried reading the pin state from:&lt;/SPAN&gt;&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;&lt;P class=""&gt;&lt;SPAN&gt;GPIO12-&amp;gt;PSR (bit 1)&lt;/SPAN&gt;&lt;/P&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P class=""&gt;&lt;SPAN&gt;GPIO6-&amp;gt;PSR (bit 1)&lt;/SPAN&gt;&lt;/P&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P class=""&gt;&lt;SPAN&gt;RGPIO_LPSR-&amp;gt;PDIR (bit 1)&lt;/SPAN&gt;&lt;/P&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;P class=""&gt;&lt;SPAN&gt;while the pin is configured as &lt;/SPAN&gt;&lt;STRONG&gt;&lt;SPAN&gt;ALT6 (LPUART12_RXD)&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;SPAN&gt; with &lt;/SPAN&gt;&lt;STRONG&gt;&lt;SPAN&gt;SION enabled&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;SPAN&gt;.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;In all cases, the read value remains constant and does not reflect the actual logic level on the RX line.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN&gt;My question is therefore not how to read GPIO_PSR, but whether the &lt;/SPAN&gt;&lt;STRONG&gt;&lt;SPAN&gt;GPIO input path remains connected to the pad when the pin is muxed to a peripheral function (ALT6)&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;SPAN&gt; on the i.MX RT1170.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN&gt;Could you please confirm whether GPIO_PSR readback is expected to work simultaneously with LPUART RX functionality, or if the GPIO path is disconnected once the peripheral mux is selected?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Thank you for your clarification.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 02 Mar 2026 08:37:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/lpuart12/m-p/2324880#M31268</guid>
      <dc:creator>Ajas</dc:creator>
      <dc:date>2026-03-02T08:37:23Z</dc:date>
    </item>
    <item>
      <title>Re: lpuart12</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/lpuart12/m-p/2330936#M31319</link>
      <description>&lt;P&gt;Hello &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/205947"&gt;@Ajas&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;After investigating further, this behavior is to be expected, since the SION bit is not designed to be operated with the UART module.&lt;/P&gt;
&lt;P&gt;If this functionality is required for your application, you have two options depending on your requirements:&lt;/P&gt;
&lt;P&gt;-If you need to see the UART frame at the same time that you are receiving, you can use another pin configured as a GPIO and monitor the RX signal from there.&lt;BR /&gt;-If you need to monitor it when you are not receiving a frame. Temporarily reconfigure the RX pin as a GPIO when you need to read its physical logic level and then switch it back to UART RX.&lt;/P&gt;
&lt;P&gt;BR&lt;BR /&gt;Habib&lt;/P&gt;</description>
      <pubDate>Wed, 11 Mar 2026 22:54:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/lpuart12/m-p/2330936#M31319</guid>
      <dc:creator>Habib_MS</dc:creator>
      <dc:date>2026-03-11T22:54:48Z</dc:date>
    </item>
    <item>
      <title>Re: lpuart12</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/lpuart12/m-p/2331167#M31320</link>
      <description>&lt;P class=""&gt;&lt;SPAN&gt;Hello Habib,&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN&gt;Thank you for the clarification.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN&gt;However, I must admit that I am a bit frustrated with the way this question has been handled. In my initial message, I clearly described the tests I had already performed, including reading the GPIO_PSR registers and enabling SION. Your first reply simply suggested checking GPIO_PSR and reviewing the application note, which was information I had already explicitly mentioned.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN&gt;Because of this, the response did not really address my actual question and led me to spend additional time re-explaining the same points.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN&gt;What I was trying to understand from the beginning was whether the GPIO input path remains connected to the pad when the pin is muxed to a peripheral function (ALT6) on the i.MX RT1170. Your latest message finally clarifies that this is not supported with the UART module, which is the information I was looking for.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN&gt;For future exchanges, I would appreciate if the initial question and the described tests could be reviewed more carefully, as this would help avoid unnecessary back-and-forth and save time on both sides.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Best regards.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 12 Mar 2026 08:44:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/lpuart12/m-p/2331167#M31320</guid>
      <dc:creator>Ajas</dc:creator>
      <dc:date>2026-03-12T08:44:17Z</dc:date>
    </item>
    <item>
      <title>Re: lpuart12</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/lpuart12/m-p/2331852#M31325</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/205947"&gt;@Ajas&lt;/a&gt;,&lt;BR /&gt;&lt;BR /&gt;Sorry for the misunderstanding.&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;Habib&lt;/P&gt;</description>
      <pubDate>Thu, 12 Mar 2026 20:45:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/lpuart12/m-p/2331852#M31325</guid>
      <dc:creator>Habib_MS</dc:creator>
      <dc:date>2026-03-12T20:45:46Z</dc:date>
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