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    <title>Other NXP ProductsのトピックLPSPI3 eDMA max transfer size</title>
    <link>https://community.nxp.com/t5/Other-NXP-Products/LPSPI3-eDMA-max-transfer-size/m-p/2178070#M30230</link>
    <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;Linux version 6.6.101&lt;BR /&gt;Machine model: NXP i.MX93 11X11 EVK board&lt;/P&gt;&lt;P&gt;I'm trying to develop st7789v LCD display controller using SPI connection through iMX93 evk expansion connector.&lt;/P&gt;&lt;P&gt;I'm trying to use DRM framework. It works fine without DMA, but some performance limitation.&lt;/P&gt;&lt;P&gt;With DMA activated, i'm facing some kind of limitation. The DRM framework is trying to update the whole screen with framebuffer content (size is 115200 bytes), through DMA and is failing as &lt;SPAN&gt;FSL_LPSPI_MAX_EDMA_BYTES&lt;/SPAN&gt; is 32K. I was expecting that this kind of big transfer will be split in chunk of max DMA transfer size, but it seems not.&lt;/P&gt;&lt;P&gt;I don't now how to manage this issue. I tried to align&amp;nbsp;&lt;SPAN&gt;spi_max_transfer_size on&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;FSL_LPSPI_MAX_EDMA_BYTES, but it blocks at spi driver probe.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Can someone help on this issue?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Thanks&lt;/SPAN&gt;&lt;/P&gt;</description>
    <pubDate>Tue, 30 Sep 2025 09:22:59 GMT</pubDate>
    <dc:creator>barandas</dc:creator>
    <dc:date>2025-09-30T09:22:59Z</dc:date>
    <item>
      <title>LPSPI3 eDMA max transfer size</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/LPSPI3-eDMA-max-transfer-size/m-p/2178070#M30230</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;Linux version 6.6.101&lt;BR /&gt;Machine model: NXP i.MX93 11X11 EVK board&lt;/P&gt;&lt;P&gt;I'm trying to develop st7789v LCD display controller using SPI connection through iMX93 evk expansion connector.&lt;/P&gt;&lt;P&gt;I'm trying to use DRM framework. It works fine without DMA, but some performance limitation.&lt;/P&gt;&lt;P&gt;With DMA activated, i'm facing some kind of limitation. The DRM framework is trying to update the whole screen with framebuffer content (size is 115200 bytes), through DMA and is failing as &lt;SPAN&gt;FSL_LPSPI_MAX_EDMA_BYTES&lt;/SPAN&gt; is 32K. I was expecting that this kind of big transfer will be split in chunk of max DMA transfer size, but it seems not.&lt;/P&gt;&lt;P&gt;I don't now how to manage this issue. I tried to align&amp;nbsp;&lt;SPAN&gt;spi_max_transfer_size on&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;FSL_LPSPI_MAX_EDMA_BYTES, but it blocks at spi driver probe.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Can someone help on this issue?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Thanks&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 30 Sep 2025 09:22:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/LPSPI3-eDMA-max-transfer-size/m-p/2178070#M30230</guid>
      <dc:creator>barandas</dc:creator>
      <dc:date>2025-09-30T09:22:59Z</dc:date>
    </item>
    <item>
      <title>Re: LPSPI3 eDMA max transfer size</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/LPSPI3-eDMA-max-transfer-size/m-p/2178275#M30233</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;DIV style="display: contents;" data-subtree="aimfl" data-processed="true"&gt;
&lt;DIV style="display: contents;" data-subtree="aimfl" data-processed="true"&gt;The maximum eDMA transfer size for NXP LPSPI (Low-Power SPI) is generally &lt;STRONG class="Yjhzub" data-processed="true"&gt;32 KBytes&lt;/STRONG&gt; (32 * 1024 bytes), but this depends eDMA controller's BITER register, which limits transfers to 2^15 bytes (32KB) per transfer. The transfer size also needs to adhere to the &amp;nbsp;bytesperFrame requirements of the LPSPI driver, ensuring it's an integer multiple of bytesPerFrame, especially when bytesPerFrame is greater than 4&lt;/DIV&gt;
&lt;/DIV&gt;
&lt;DIV class="Y3BBE" data-hveid="CAIQAA" data-processed="true"&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;P&gt;&lt;SPAN class="T286Pc" data-processed="true"&gt;&amp;nbsp;BITTER Limit: The eDMA controller has a limit on the BITER (bytes in transfer) register, which restricts the maximum bytes per transfer. For i.MX devices, this limit is typically 2^15 bytes, or 32 KBytes.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN class="T286Pc" data-processed="true"&gt;&amp;nbsp;LSPI Driver Requirements&lt;STRONG class="Yjhzub" data-processed="true"&gt;&lt;SPAN data-processed="true"&gt;:&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;SPAN data-processed="true"&gt; The LPSPI eDMA driver in the MCUXpresso SDK imposes its own constraints&lt;/SPAN&gt;&lt;SPAN data-processed="true"&gt;.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;
&lt;UL class="U6u95" data-processed="true"&gt;
&lt;LI data-hveid="CAMQBA"&gt;&lt;SPAN class="T286Pc"&gt;If &lt;CODE class="o8j0Mc"&gt;bytesPerFrame&lt;/CODE&gt; is 4 or less, the transfer size can be any integer multiple of &lt;CODE class="o8j0Mc"&gt;bytesPerFrame&lt;/CODE&gt;.&lt;/SPAN&gt;&lt;/LI&gt;
&lt;LI data-hveid="CAMQBQ"&gt;&lt;SPAN class="T286Pc"&gt;If &lt;CODE class="o8j0Mc"&gt;bytesPerFrame&lt;/CODE&gt; is greater than 4, the transfer size must be exactly &lt;CODE class="o8j0Mc"&gt;bytesPerFrame&lt;/CODE&gt; or an integer multiple of &lt;CODE class="o8j0Mc"&gt;bytesPerFrame&lt;/CODE&gt;.&lt;/SPAN&gt;&lt;SPAN class="notranslate" data-wiz-uids="g7ZPCc_1c,g7ZPCc_1d"&gt;&lt;SPAN class="vKEkVd" data-animation-atomic=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/LI&gt;
&lt;/UL&gt;
&lt;OL class="VimKh" data-processed="true"&gt;
&lt;LI style="list-style-type: none;" value="2" data-hveid="CAMQAg" data-processed="true"&gt;&amp;nbsp;&lt;/LI&gt;
&lt;/OL&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;DIV class="Y3BBE" data-hveid="CAQQAA" data-processed="true"&gt;&lt;STRONG class="Yjhzub"&gt;Practical Considerations&lt;/STRONG&gt;&lt;/DIV&gt;
&lt;DIV class="Y3BBE" data-hveid="CAQQAA" data-processed="true"&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;DIV class="Fsg96" data-processed="true"&gt;&amp;nbsp;&lt;/DIV&gt;
&lt;UL class="W4TX6e" data-processed="true"&gt;
&lt;LI&gt;&lt;SPAN class="ymCSIb" data-hveid="CAUQAA"&gt;&lt;SPAN class="dsyJjd"&gt;&lt;SPAN class="T286Pc"&gt;Check Your Datasheet:&lt;/SPAN&gt;&lt;/SPAN&gt; While 32KB is a common limit, always refer to the specific datasheet for your i.MX to confirm the maximum BITER value and eDMA capabilities.&lt;SPAN class="notranslate" data-wiz-uids="g7ZPCc_1p,g7ZPCc_1q"&gt;&lt;SPAN class="vKEkVd" data-animation-atomic=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/LI&gt;
&lt;/UL&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;UL&gt;
&lt;LI&gt;&lt;SPAN class="ymCSIb" data-hveid="CAUQAw"&gt;&lt;SPAN class="dsyJjd"&gt;&lt;SPAN class="T286Pc"&gt;Test with Your Driver:&lt;/SPAN&gt;&lt;/SPAN&gt; Implement and test your eDMA transfer logic with the appropriate LPSPI configuration in your MCUXpresso SDK project to ensure it meets both the hardware and driver requirements&lt;/SPAN&gt;&lt;/LI&gt;
&lt;/UL&gt;
&lt;P&gt;&lt;SPAN class="ymCSIb" data-hveid="CAUQAw"&gt;Regards&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 30 Sep 2025 14:42:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/LPSPI3-eDMA-max-transfer-size/m-p/2178275#M30233</guid>
      <dc:creator>Bio_TICFSL</dc:creator>
      <dc:date>2025-09-30T14:42:10Z</dc:date>
    </item>
    <item>
      <title>Re: LPSPI3 eDMA max transfer size</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/LPSPI3-eDMA-max-transfer-size/m-p/2181118#M30273</link>
      <description>Thanks</description>
      <pubDate>Tue, 07 Oct 2025 10:04:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/LPSPI3-eDMA-max-transfer-size/m-p/2181118#M30273</guid>
      <dc:creator>barandas</dc:creator>
      <dc:date>2025-10-07T10:04:53Z</dc:date>
    </item>
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