topic PCAL 6534 Power sequence in Other NXP Products

PCAL 6534 Power sequence

sohee — Wed, 10 Sep 2025 06:16:08 GMT

Is there any power that needs to be turn on first, VDD(P) or VDD(I2C_BUS)?

Does it need a power sequence for PCAL6534?

Re: PCAL 6534 Power sequence

TomasVaverka — Wed, 10 Sep 2025 10:22:25 GMT

Hi,

VDD(P) should be powered first or at least not later than VDD(I2C_BUS). This ensures the internal circuits and registers are properly initialized before communication begins.

BRs, Tomas

Re: PCAL 6534 Power sequence

sohee — Wed, 10 Sep 2025 23:33:49 GMT

Is there exact power sequence that contains timing?

Actually, VDD_I2C is powered first than VDD_P in design.

Re: PCAL 6534 Power sequence

TomasVaverka — Thu, 11 Sep 2025 06:37:24 GMT

Hi,

There is no exact timing sequence specified. If VDD_I2C is powered first in your design, ensure that VDD_P ramps up promptly and reaches the POR threshold before any I²C communication is attempted. Note that the POR reset delay time is approximately 1 µs after VDD_P crosses the threshold. So to ensure reliable operation, allow a short delay (e.g. a few microseconds) after VDD_P is stable before initiating I²C transactions.

BRs, Tomas