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    <title>Other NXP ProductsのトピックRe: RW612-GPIO Pin Conflicts</title>
    <link>https://community.nxp.com/t5/Other-NXP-Products/RW612-GPIO-Pin-Conflicts/m-p/2151475#M29670</link>
    <description>&lt;P&gt;&lt;SPAN&gt;They are not conflicted -- one is for&amp;nbsp;GPIO_2_FC0_I2S_DATA and the other is for&amp;nbsp;GPIO_2_FC0_UART_RXD_ME, as shown in the FRDM-RW612-SCH.pdf. Thanks to your post, I spotted the difference. I've spent almost a week trying to figure out why my usart had no output...&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;</description>
    <pubDate>Wed, 13 Aug 2025 08:12:22 GMT</pubDate>
    <dc:creator>AndrewChuang</dc:creator>
    <dc:date>2025-08-13T08:12:22Z</dc:date>
    <item>
      <title>RW612-GPIO Pin Conflicts</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/RW612-GPIO-Pin-Conflicts/m-p/1992113#M26340</link>
      <description>&lt;DIV class=""&gt;&lt;DIV&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&lt;SPAN&gt;Hello,&lt;/SPAN&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&lt;P&gt;While running the SCTimer example, I noticed some duplicated GPIOs in the quick start guide:&lt;/P&gt;Connector Pin # GPIO # &lt;TABLE&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD&gt;J2&lt;/TD&gt;&lt;TD&gt;4&lt;/TD&gt;&lt;TD&gt;52&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD&gt;J4&lt;/TD&gt;&lt;TD&gt;5&lt;/TD&gt;&lt;TD&gt;52&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD&gt;J5&lt;/TD&gt;&lt;TD&gt;4&lt;/TD&gt;&lt;TD&gt;3&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD&gt;J1&lt;/TD&gt;&lt;TD&gt;3&lt;/TD&gt;&lt;TD&gt;3&lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;P&gt;It appears that for the example, J5 pin 4 should correctly correspond to GPIO 3. Is there a resource where I can find the accurate pinout information?&lt;/P&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;</description>
      <pubDate>Mon, 11 Nov 2024 16:39:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/RW612-GPIO-Pin-Conflicts/m-p/1992113#M26340</guid>
      <dc:creator>wima88</dc:creator>
      <dc:date>2024-11-11T16:39:24Z</dc:date>
    </item>
    <item>
      <title>Re: RW612-GPIO Pin Conflicts</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/RW612-GPIO-Pin-Conflicts/m-p/1992236#M26343</link>
      <description>&lt;P&gt;Hi,&lt;BR /&gt;&lt;BR /&gt;Are you using the FRDM-RW612?&lt;BR /&gt;&lt;BR /&gt;Regards,&lt;/P&gt;
&lt;P&gt;Daniel.&lt;/P&gt;</description>
      <pubDate>Mon, 11 Nov 2024 22:23:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/RW612-GPIO-Pin-Conflicts/m-p/1992236#M26343</guid>
      <dc:creator>DanielRuvalcaba</dc:creator>
      <dc:date>2024-11-11T22:23:48Z</dc:date>
    </item>
    <item>
      <title>Re: RW612-GPIO Pin Conflicts</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/RW612-GPIO-Pin-Conflicts/m-p/1997436#M26472</link>
      <description>&lt;P&gt;Yes&lt;/P&gt;</description>
      <pubDate>Tue, 19 Nov 2024 19:23:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/RW612-GPIO-Pin-Conflicts/m-p/1997436#M26472</guid>
      <dc:creator>wima88</dc:creator>
      <dc:date>2024-11-19T19:23:05Z</dc:date>
    </item>
    <item>
      <title>Re: RW612-GPIO Pin Conflicts</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/RW612-GPIO-Pin-Conflicts/m-p/2151475#M29670</link>
      <description>&lt;P&gt;&lt;SPAN&gt;They are not conflicted -- one is for&amp;nbsp;GPIO_2_FC0_I2S_DATA and the other is for&amp;nbsp;GPIO_2_FC0_UART_RXD_ME, as shown in the FRDM-RW612-SCH.pdf. Thanks to your post, I spotted the difference. I've spent almost a week trying to figure out why my usart had no output...&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 13 Aug 2025 08:12:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/RW612-GPIO-Pin-Conflicts/m-p/2151475#M29670</guid>
      <dc:creator>AndrewChuang</dc:creator>
      <dc:date>2025-08-13T08:12:22Z</dc:date>
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