PCA9500 Write Cycle

stadium_aquino — Thu, 29 May 2025 22:19:38 GMT

I am designing a product that may be subject to unexpected power cuts. It's my understanding that in general, EEPROMs perform writes by:

- Erasing the page, setting all bits to 1

- Programming the page, clearing bits to 0 as appropriate

Is this how the PCA9500's write cycle works? In particular,

- If I perform a page write to bytes at addresses 0, 1, 2, and 3, and then I cut the power during the write, is it possible for the data at those addresses to be neither the original data nor the written data?

- If I perform a byte write at address 1 and then I cut power during the write, is it possible for data at addresses 0, 2, and 3 to be corrupted?

I believe the answer to these questions is "yes," but I'd like to confirm that.

Re: PCA9500 Write Cycle

guoweisun — Fri, 30 May 2025 08:24:40 GMT

I think your questions answer are Yes.

topic Re: PCA9500 Write Cycle in Other NXP Products

PCA9500 Write Cycle

Re: PCA9500 Write Cycle