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    <title>topic Chip Select register with 8bit bus size... in Other NXP Products</title>
    <link>https://community.nxp.com/t5/Other-NXP-Products/Chip-Select-register-with-8bit-bus-size/m-p/265362#M2820</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;We have a problem to communicate with a register, CS4, at at 0x10020000. In U-boot that reg has the value 0x45fab3c1, but when we try to access it we get:&amp;nbsp; 0x10101010 and we are not able to write too.&lt;/P&gt;&lt;P&gt;With CS3 everything seems ok, we can read and write. CS3 is at: 0x10000000.&lt;/P&gt;&lt;P&gt;The main/only differences between cs3 and cs4 are:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="text-decoration: underline;"&gt;&lt;STRONG&gt;Chip Select: Lp_cs3&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Bus size: 32 bit&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;Bus control: 2 wait state R/W ACK disabled&lt;/P&gt;&lt;P&gt;Allocated size 32Kbyte&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="text-decoration: underline;"&gt;&lt;STRONG&gt;Chip Select: Lp_cs4&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Bus size: 8 bit&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;Bus control: 2 wait state R/W ACK disabled&lt;/P&gt;&lt;P&gt;Allocated size: 4 KByte&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In userspace we use:&lt;/P&gt;&lt;PRE __default_attr="c++" __jive_macro_name="code" class="jive_text_macro jive_macro_code _jivemacro_uid_13872878985772570" jivemacro_uid="_13872878985772570"&gt;
&lt;P&gt;/*————————————————————————————————*/&lt;/P&gt;
&lt;P&gt;//code from memedit.c&lt;/P&gt;
&lt;P&gt;int fd;&lt;/P&gt;
&lt;P&gt;fd = open("/dev/mem", O_SYNC | O_RDWR);&lt;/P&gt;
&lt;P&gt;mem = mmap(NULL, 4096, PROT_READ | PROT_WRITE, MAP_SHARED, fd, offset &amp;amp; (~4095));&lt;/P&gt;
&lt;P&gt;printf("/dev/mem[0x%08x] = 0x%08x", offset, *(unsigned int*)&amp;amp;mem[offset &amp;amp; 4095]);&lt;/P&gt;
&lt;P&gt;&lt;/P&gt;
&lt;P&gt;&lt;/P&gt;
&lt;P&gt;//to write&lt;/P&gt;
&lt;P&gt;*((unsigned int *)&amp;amp;mem[offset &amp;amp; 4095]) = input;&lt;/P&gt;
&lt;P&gt;/*————————————————————————————————*/&lt;/P&gt;


&lt;/PRE&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In our kernel module:&lt;/P&gt;&lt;PRE __default_attr="c++" __jive_macro_name="code" class="jive_text_macro _jivemacro_uid_13872878985615448 jive_macro_code" jivemacro_uid="_13872878985615448"&gt;
&lt;P&gt;/*————————————————————————————————*/&lt;/P&gt;
&lt;P&gt;#define CS4_START&amp;nbsp;&amp;nbsp; 0x10020000U&lt;/P&gt;
&lt;P&gt;#define CS4_STOP&amp;nbsp;&amp;nbsp; 0x10040000U&lt;/P&gt;
&lt;P&gt;#define CS4_SIZE&amp;nbsp;&amp;nbsp; 0x00020000U&lt;/P&gt;
&lt;P&gt;#define CS3_START&amp;nbsp;&amp;nbsp; 0x10000000U&lt;/P&gt;
&lt;P&gt;#define CS3_STOP&amp;nbsp;&amp;nbsp; 0x10020000U&lt;/P&gt;
&lt;P&gt;#define CS3_SIZE&amp;nbsp;&amp;nbsp; 0x00020000U&lt;/P&gt;
&lt;P&gt;&lt;/P&gt;
&lt;P&gt;&lt;/P&gt;
&lt;P&gt;void __iomem *cs3_ioaddr&amp;nbsp;&amp;nbsp; = ioremap ((volatile unsigned long)(CS3_START), CS3_SIZE);&lt;/P&gt;
&lt;P&gt;printk("We read value at CS3: %x \n\n\n",in_be32(cs3_ioaddr+0x0018));&lt;/P&gt;
&lt;P&gt;out_be32(cs3_ioaddr+0x0018,0x00000001);&lt;/P&gt;
&lt;P&gt;printk("We read written value: %x \n\n\n",in_be32(cs3_ioaddr+0x0018));&lt;/P&gt;
&lt;P&gt;/*————————————————————————————————*/&lt;/P&gt;


&lt;/PRE&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Platform is based on mpc5200b CPU and fpga is a Xilinx Virtex4.&lt;/P&gt;&lt;P&gt;Kernel we use: 2.6.33&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks again in advance…&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Lorenzo&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 17 Dec 2013 10:42:57 GMT</pubDate>
    <dc:creator>lorenzoforzini</dc:creator>
    <dc:date>2013-12-17T10:42:57Z</dc:date>
    <item>
      <title>Chip Select register with 8bit bus size...</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/Chip-Select-register-with-8bit-bus-size/m-p/265362#M2820</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;We have a problem to communicate with a register, CS4, at at 0x10020000. In U-boot that reg has the value 0x45fab3c1, but when we try to access it we get:&amp;nbsp; 0x10101010 and we are not able to write too.&lt;/P&gt;&lt;P&gt;With CS3 everything seems ok, we can read and write. CS3 is at: 0x10000000.&lt;/P&gt;&lt;P&gt;The main/only differences between cs3 and cs4 are:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="text-decoration: underline;"&gt;&lt;STRONG&gt;Chip Select: Lp_cs3&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Bus size: 32 bit&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;Bus control: 2 wait state R/W ACK disabled&lt;/P&gt;&lt;P&gt;Allocated size 32Kbyte&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="text-decoration: underline;"&gt;&lt;STRONG&gt;Chip Select: Lp_cs4&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Bus size: 8 bit&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;Bus control: 2 wait state R/W ACK disabled&lt;/P&gt;&lt;P&gt;Allocated size: 4 KByte&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In userspace we use:&lt;/P&gt;&lt;PRE __default_attr="c++" __jive_macro_name="code" class="jive_text_macro jive_macro_code _jivemacro_uid_13872878985772570" jivemacro_uid="_13872878985772570"&gt;
&lt;P&gt;/*————————————————————————————————*/&lt;/P&gt;
&lt;P&gt;//code from memedit.c&lt;/P&gt;
&lt;P&gt;int fd;&lt;/P&gt;
&lt;P&gt;fd = open("/dev/mem", O_SYNC | O_RDWR);&lt;/P&gt;
&lt;P&gt;mem = mmap(NULL, 4096, PROT_READ | PROT_WRITE, MAP_SHARED, fd, offset &amp;amp; (~4095));&lt;/P&gt;
&lt;P&gt;printf("/dev/mem[0x%08x] = 0x%08x", offset, *(unsigned int*)&amp;amp;mem[offset &amp;amp; 4095]);&lt;/P&gt;
&lt;P&gt;&lt;/P&gt;
&lt;P&gt;&lt;/P&gt;
&lt;P&gt;//to write&lt;/P&gt;
&lt;P&gt;*((unsigned int *)&amp;amp;mem[offset &amp;amp; 4095]) = input;&lt;/P&gt;
&lt;P&gt;/*————————————————————————————————*/&lt;/P&gt;


&lt;/PRE&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In our kernel module:&lt;/P&gt;&lt;PRE __default_attr="c++" __jive_macro_name="code" class="jive_text_macro _jivemacro_uid_13872878985615448 jive_macro_code" jivemacro_uid="_13872878985615448"&gt;
&lt;P&gt;/*————————————————————————————————*/&lt;/P&gt;
&lt;P&gt;#define CS4_START&amp;nbsp;&amp;nbsp; 0x10020000U&lt;/P&gt;
&lt;P&gt;#define CS4_STOP&amp;nbsp;&amp;nbsp; 0x10040000U&lt;/P&gt;
&lt;P&gt;#define CS4_SIZE&amp;nbsp;&amp;nbsp; 0x00020000U&lt;/P&gt;
&lt;P&gt;#define CS3_START&amp;nbsp;&amp;nbsp; 0x10000000U&lt;/P&gt;
&lt;P&gt;#define CS3_STOP&amp;nbsp;&amp;nbsp; 0x10020000U&lt;/P&gt;
&lt;P&gt;#define CS3_SIZE&amp;nbsp;&amp;nbsp; 0x00020000U&lt;/P&gt;
&lt;P&gt;&lt;/P&gt;
&lt;P&gt;&lt;/P&gt;
&lt;P&gt;void __iomem *cs3_ioaddr&amp;nbsp;&amp;nbsp; = ioremap ((volatile unsigned long)(CS3_START), CS3_SIZE);&lt;/P&gt;
&lt;P&gt;printk("We read value at CS3: %x \n\n\n",in_be32(cs3_ioaddr+0x0018));&lt;/P&gt;
&lt;P&gt;out_be32(cs3_ioaddr+0x0018,0x00000001);&lt;/P&gt;
&lt;P&gt;printk("We read written value: %x \n\n\n",in_be32(cs3_ioaddr+0x0018));&lt;/P&gt;
&lt;P&gt;/*————————————————————————————————*/&lt;/P&gt;


&lt;/PRE&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Platform is based on mpc5200b CPU and fpga is a Xilinx Virtex4.&lt;/P&gt;&lt;P&gt;Kernel we use: 2.6.33&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks again in advance…&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Lorenzo&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 17 Dec 2013 10:42:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/Chip-Select-register-with-8bit-bus-size/m-p/265362#M2820</guid>
      <dc:creator>lorenzoforzini</dc:creator>
      <dc:date>2013-12-17T10:42:57Z</dc:date>
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