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    <title>Other NXP ProductsのトピックRe: RS485 console setup and M-core not working after linux Boot.</title>
    <link>https://community.nxp.com/t5/Other-NXP-Products/RS485-console-setup-and-M-core-not-working-after-linux-Boot/m-p/2022678#M27010</link>
    <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/241286"&gt;@ajaysinh9484&lt;/a&gt;!&lt;/P&gt;
&lt;P&gt;Thank you for contacting NXP Support!&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;For Linux release version L5.15.71-2.2.0 and later, the &lt;STRONG&gt;run prepare_mcore&lt;/STRONG&gt; command must run&lt;BR /&gt;before the &lt;STRONG&gt;bootaux&lt;/STRONG&gt; command.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;After that you have to configure the rpmsg in device tree.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Best Regards!&lt;/P&gt;
&lt;P&gt;Chavira&lt;/P&gt;</description>
    <pubDate>Mon, 06 Jan 2025 16:41:41 GMT</pubDate>
    <dc:creator>Chavira</dc:creator>
    <dc:date>2025-01-06T16:41:41Z</dc:date>
    <item>
      <title>RS485 console setup and M-core not working after linux Boot.</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/RS485-console-setup-and-M-core-not-working-after-linux-Boot/m-p/2020817#M26970</link>
      <description>&lt;DIV&gt;hello NXP community,&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;currently i am working on andorid_11 based application on imx8mm evk board.&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;so here i am developping RPMsg based multicore application. in my application&amp;nbsp;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;freeRTOS (M-core) side i configured UART1 as RS485 and UART4 is defult consol&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;for M-core. and also i configured i2c functionality.&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;Configuration pin :&amp;nbsp;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;1 ] RS485[UART1(A53)] in M-core : pin_mux.c&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;gt;&amp;gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;IOMUXC_SetPinMux(IOMUXC_SAI2_RXC_UART1_RX, 0U);&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; IOMUXC_SetPinConfig(IOMUXC_SAI2_RXC_UART1_RX,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; IOMUXC_SW_PAD_CTL_PAD_DSE(6U) |&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; IOMUXC_SW_PAD_CTL_PAD_FSEL(2U));&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; IOMUXC_SetPinMux(IOMUXC_SAI2_RXFS_UART1_TX, 0U);&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; IOMUXC_SetPinConfig(IOMUXC_SAI2_RXFS_UART1_TX,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; IOMUXC_SW_PAD_CTL_PAD_DSE(6U) |&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; IOMUXC_SW_PAD_CTL_PAD_FSEL(2U));&amp;nbsp;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; // DSE is DriveStrength, FSEL is SlewRate&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; IOMUXC_SetPinMux(IOMUXC_UART3_RXD_GPIO5_IO26, 0U);&amp;nbsp; // UART_C_CTS on schematic (VH1, pin 12) - CeLAN_DIRECTION_GPIO&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;// software I2C&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; IOMUXC_SetPinMux(IOMUXC_UART3_TXD_GPIO5_IO27, 0U);&amp;nbsp; // UART_C_RTS on schematic (VH1, pin 7) - SCL&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; IOMUXC_SetPinConfig(IOMUXC_UART3_TXD_GPIO5_IO27,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; IOMUXC_SW_PAD_CTL_PAD_PE(1U) |&amp;nbsp; &amp;nbsp; &amp;nbsp; // enable pull resistors&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; IOMUXC_SW_PAD_CTL_PAD_PUE(1U) |&amp;nbsp; &amp;nbsp; &amp;nbsp;// set to pull-up resistors&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; IOMUXC_SW_PAD_CTL_PAD_ODE(1U) |&amp;nbsp; &amp;nbsp; &amp;nbsp;// output is open drain&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; IOMUXC_SW_PAD_CTL_PAD_FSEL(2U) |&amp;nbsp; &amp;nbsp; // fast slew rate&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; IOMUXC_SW_PAD_CTL_PAD_DSE(6U));&amp;nbsp; &amp;nbsp; &amp;nbsp;// drive strength&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; IOMUXC_SetPinMux(IOMUXC_GPIO1_IO11_GPIO1_IO11, 0U); // DSI_RST on schematic (VH1, pin 36)&amp;nbsp; &amp;nbsp;- SDA&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; IOMUXC_SetPinConfig(IOMUXC_GPIO1_IO11_GPIO1_IO11,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; IOMUXC_SW_PAD_CTL_PAD_PE(1U) |&amp;nbsp; &amp;nbsp; &amp;nbsp; // enable pull resistors&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; IOMUXC_SW_PAD_CTL_PAD_HYS_MASK |&amp;nbsp; &amp;nbsp; // Schmitt trigger input&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; IOMUXC_SW_PAD_CTL_PAD_PUE(1U) |&amp;nbsp; &amp;nbsp; &amp;nbsp;// set to pull-up resistors&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; IOMUXC_SW_PAD_CTL_PAD_ODE(1U) |&amp;nbsp; &amp;nbsp; &amp;nbsp;// output is open drain&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; IOMUXC_SW_PAD_CTL_PAD_FSEL(2U) |&amp;nbsp; &amp;nbsp; // fast slew rate&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; IOMUXC_SW_PAD_CTL_PAD_DSE(6U));&amp;nbsp; &amp;nbsp; &amp;nbsp;// drive strength&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;gt;&amp;gt;&amp;nbsp; &amp;nbsp;In linux side disabled node: in dtsi&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;amp;uart1 { /* baseboard, UART_C */&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;pinctrl-names = "default";&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;pinctrl-0 = &amp;lt;&amp;amp;pinctrl_uart1&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;assigned-clocks = &amp;lt;&amp;amp;clk IMX8MM_CLK_UART1&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;assigned-clock-parents = &amp;lt;&amp;amp;clk IMX8MM_SYS_PLL1_80M&amp;gt;;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;fsl,uart-has-rtscts;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;status = "disabled";&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;};&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;Now what i am doing.&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;Turn on board. loading firmware from U-boot :&amp;nbsp;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;STRONG&gt;setenv m4_boot 'ext4load mmc 2:8 0x48000000 rpmsg_lite_pingpong_rtos_linux_remote.bin;&amp;nbsp;&lt;/STRONG&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;STRONG&gt;cp.b 0x48000000 0x7e0000 0x4E58;bootaux 0x7e0000;'&lt;/STRONG&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;BR /&gt;&lt;STRONG&gt;saveenv&lt;/STRONG&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;than boot M-core : &lt;STRONG&gt;run m4_boot&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;thr M-core is successfully running. and show print : " UART1 init SUCCESS "&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;gt;&amp;gt; now in Rs485 console(using minicom), set boudrate : 38400 and enable linefeed. (CF).&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp;than trying to somthig write on terminal nothing write or shown on consol but intrrupt&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp;working.and passing data true. probe with logic analyzer.&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;gt;&amp;gt; while i press ctrl + j. on terminal at that time on M-core console shown "*** NEW COMMAND IS IN ***"&amp;nbsp;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;but it works only one time. and than nothing.&amp;nbsp;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;next i turn board in linux android BOOT mode:&amp;nbsp;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;but here M-core console not responding or noting print visible. maybe M-core freeze or somthing.&amp;nbsp;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;but while run cmd : the stae is running.&lt;BR /&gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Screenshot from 2024-12-31 17-15-42.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/317752iAEDB9F67E7D6FC5E/image-size/large?v=v2&amp;amp;px=999" role="button" title="Screenshot from 2024-12-31 17-15-42.png" alt="Screenshot from 2024-12-31 17-15-42.png" /&gt;&lt;/span&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;STRONG&gt;cat /sys/class/remoteproc/remoteproc0/state&lt;/STRONG&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;STRONG&gt;running&lt;BR /&gt;&lt;BR /&gt;I kindly request the NXP community to assist me with an issue regarding the RS485 console setup and M-core not working during the Linux boot process. Additional configuration details and the main file are attached. freRTOS&lt;/STRONG&gt;&lt;/DIV&gt;</description>
      <pubDate>Tue, 31 Dec 2024 12:09:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/RS485-console-setup-and-M-core-not-working-after-linux-Boot/m-p/2020817#M26970</guid>
      <dc:creator>ajaysinh9484</dc:creator>
      <dc:date>2024-12-31T12:09:00Z</dc:date>
    </item>
    <item>
      <title>Re: RS485 console setup and M-core not working after linux Boot.</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/RS485-console-setup-and-M-core-not-working-after-linux-Boot/m-p/2022678#M27010</link>
      <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/241286"&gt;@ajaysinh9484&lt;/a&gt;!&lt;/P&gt;
&lt;P&gt;Thank you for contacting NXP Support!&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;For Linux release version L5.15.71-2.2.0 and later, the &lt;STRONG&gt;run prepare_mcore&lt;/STRONG&gt; command must run&lt;BR /&gt;before the &lt;STRONG&gt;bootaux&lt;/STRONG&gt; command.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;After that you have to configure the rpmsg in device tree.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Best Regards!&lt;/P&gt;
&lt;P&gt;Chavira&lt;/P&gt;</description>
      <pubDate>Mon, 06 Jan 2025 16:41:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/RS485-console-setup-and-M-core-not-working-after-linux-Boot/m-p/2022678#M27010</guid>
      <dc:creator>Chavira</dc:creator>
      <dc:date>2025-01-06T16:41:41Z</dc:date>
    </item>
    <item>
      <title>Re: RS485 console setup and M-core not working after linux Boot.</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/RS485-console-setup-and-M-core-not-working-after-linux-Boot/m-p/2023191#M27025</link>
      <description>&lt;P&gt;Hello &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/206761"&gt;@Chavira&lt;/a&gt;&lt;/P&gt;&lt;P&gt;Based on my recent investigation regarding the RS-485 configuration, I found the following:&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;&lt;P&gt;&lt;STRONG&gt;M-Core Console Status:&lt;/STRONG&gt;&lt;BR /&gt;The M-core firmware is stable; it neither freezes nor crashes while handling RS-485 communication.&lt;/P&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P&gt;&lt;STRONG&gt;RS-485 Configuration in Device Tree (DTS):&lt;/STRONG&gt;&lt;BR /&gt;Below is the DTS configuration used for RS-485:&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;LI-CODE lang="c"&gt;&amp;amp;uart1 { /* baseboard, UART_C */
/*pinctrl-names = "default";
pinctrl-0 = &amp;lt;&amp;amp;pinctrl_uart1&amp;gt;;
assigned-clocks = &amp;lt;&amp;amp;clk IMX8MM_CLK_UART1&amp;gt;;
assigned-clock-parents = &amp;lt;&amp;amp;clk IMX8MM_SYS_PLL1_80M&amp;gt;;
fsl,uart-has-rtscts;*/
/* GBO 6/24/22 status = "okay"; */
/* used for CeLAN */
status = "disabled";

};


pinctrl_uart1: uart1grp {
fsl,pins = &amp;lt;
MX8MM_IOMUXC_SAI2_RXC_UART1_DCE_RX 0x000 /* UART1_RX (202) &amp;gt;&amp;gt; RS-485 RDI */
MX8MM_IOMUXC_SAI2_RXFS_UART1_DCE_TX 0x000 /* UART1_TX (204) &amp;gt;&amp;gt; RS-485 RO */
MX8MM_IOMUXC_UART3_RXD_UART1_DCE_CTS_B 0x000 /* UART1_CTS (208) &amp;gt;&amp;gt; RS-485 RE/DE */
MX8MM_IOMUXC_UART3_TXD_UART1_DCE_RTS_B 0x000
&amp;gt;;
};
&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;&lt;P&gt;&lt;STRONG&gt;Key Observations:&lt;/STRONG&gt;&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;RS-485 communication works perfectly in U-Boot.&lt;/LI&gt;&lt;LI&gt;However, after booting into Linux, RS-485 stops functioning, even though the M-Core remains operational.&lt;/LI&gt;&lt;/UL&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P&gt;&lt;STRONG&gt;Analysis and Suspicions:&lt;/STRONG&gt;&lt;BR /&gt;My understanding is that the Linux partition might be attempting to access a resource already reserved for the FreeRTOS partition. This seems to conflict with the System Controller Firmware (SCFW) configuration.&lt;/P&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P&gt;&lt;STRONG&gt;Actions Already Taken:&lt;/STRONG&gt;&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;Disabled all three pins (UART1_RX, UART1_TX, and UART1_CTS) and the UART1 node in the Linux Device Tree.&lt;/LI&gt;&lt;LI&gt;Additionally, I attempted to disable the entire GPIO4 bank in the Device Tree.&lt;BR /&gt;Unfortunately, these measures did not resolve the issue.&lt;/LI&gt;&lt;/UL&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P&gt;&lt;STRONG&gt;Request for Assistance:&lt;/STRONG&gt;&lt;BR /&gt;To achieve proper resource isolation between the M-Core and A-53 cores, I believe changes are required in the SCFW, ATF, and U-Boot configurations. Specifically, I need guidance on:&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;&lt;P&gt;&lt;STRONG&gt;System Controller Firmware (SCFW):&lt;/STRONG&gt;&lt;BR /&gt;Where and how should I configure the PADs and Peripheral Access Control for UART1/RS-485 to ensure M-Core exclusivity?&lt;/P&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P&gt;&lt;STRONG&gt;ATF and U-Boot:&lt;/STRONG&gt;&lt;BR /&gt;Any additional configurations necessary to prevent Linux from attempting to access resources allocated to M-Core?&lt;/P&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;Could you please provide detailed steps or references for configuring resource partitioning on the EVK-MIMX8MM board to ensure proper peripheral isolation?&lt;/P&gt;&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;&lt;STRONG&gt;AND for :&amp;nbsp;&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;u-boot=&amp;gt; run prepare_mcore&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;## Error: "prepare_mcore" not defined&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;u-boot=&amp;gt;&lt;/STRONG&gt;&lt;BR /&gt;&lt;BR /&gt;Thank you in advance for your support!&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;</description>
      <pubDate>Tue, 07 Jan 2025 09:52:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/RS485-console-setup-and-M-core-not-working-after-linux-Boot/m-p/2023191#M27025</guid>
      <dc:creator>ajaysinh9484</dc:creator>
      <dc:date>2025-01-07T09:52:45Z</dc:date>
    </item>
    <item>
      <title>Re: RS485 console setup and M-core not working after linux Boot.</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/RS485-console-setup-and-M-core-not-working-after-linux-Boot/m-p/2023378#M27029</link>
      <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/241286"&gt;@ajaysinh9484&lt;/a&gt;!&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Checking the code it looks like the UART1 is assigned to A core in ATF.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;To assign the UART1 to M core you should do the next modification in &lt;A href="https://github.com/nxp-imx/imx-atf/blob/lf_v2.6/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c#L113" target="_self"&gt;imx8mm_bl31_setup.c&lt;/A&gt; changing the line &lt;STRONG&gt;RDC_PDAPn(RDC_PDAP_UART1, D0R | D0W), &lt;/STRONG&gt;to &lt;STRONG&gt;RDC_PDAPn(RDC_PDAP_UART1, D1R | D1W),&lt;/STRONG&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Also you can get based in the next &lt;A href="https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/How-to-use-UART4-on-iMX8M-from-Linux-User-Space/ta-p/1762038" target="_self"&gt;community post&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Best Regards!&lt;/P&gt;
&lt;P&gt;Chavira&lt;/P&gt;</description>
      <pubDate>Tue, 07 Jan 2025 15:26:56 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/RS485-console-setup-and-M-core-not-working-after-linux-Boot/m-p/2023378#M27029</guid>
      <dc:creator>Chavira</dc:creator>
      <dc:date>2025-01-07T15:26:56Z</dc:date>
    </item>
    <item>
      <title>Re: RS485 console setup and M-core not working after linux Boot.</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/RS485-console-setup-and-M-core-not-working-after-linux-Boot/m-p/2023730#M27039</link>
      <description>&lt;P&gt;hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/206761"&gt;@Chavira&lt;/a&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;SPAN&gt;Steps Followed:&lt;/SPAN&gt;&lt;/P&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&lt;OL&gt;&lt;LI&gt;&lt;P&gt;&lt;STRONG&gt;Modification in AFT Source Code:&lt;/STRONG&gt;&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;I modified the line in&lt;U&gt; imx8mm_bl31_setup.c&lt;/U&gt; from:&lt;/LI&gt;&lt;LI&gt;&lt;BR /&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Screenshot from 2025-01-08 11-07-20.png" style="width: 468px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/318512i0FDFB865EA4641FA/image-size/large?v=v2&amp;amp;px=999" role="button" title="Screenshot from 2025-01-08 11-07-20.png" alt="Screenshot from 2025-01-08 11-07-20.png" /&gt;&lt;/span&gt;&lt;/LI&gt;&lt;LI&gt;recompiled successfully after making the changes.The updated binary was deployed to the device.&lt;P&gt;&lt;STRONG&gt;Testing:&lt;BR /&gt;&lt;/STRONG&gt;&lt;SPAN&gt;Upon booting, I attempted to use UART-1 from the M core, but the behaviour remained unchanged. UART-1 did not function as expected.&lt;BR /&gt;&lt;BR /&gt;Attached video :&amp;nbsp;&lt;BR /&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;Could you please confirm if any additional steps are required after modifying the ATF, such as changes in the U-Boot, device tree, or Linux kernel configuration? Alternatively, if there is another configuration or diagnostic step that might clarify the root cause, I am happy to provide further details.&lt;/P&gt;&lt;P&gt;Thank you for your continued support. I look forward to your guidance on resolving this issue.&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;/LI&gt;&lt;/OL&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;</description>
      <pubDate>Wed, 08 Jan 2025 06:05:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/RS485-console-setup-and-M-core-not-working-after-linux-Boot/m-p/2023730#M27039</guid>
      <dc:creator>ajaysinh9484</dc:creator>
      <dc:date>2025-01-08T06:05:13Z</dc:date>
    </item>
    <item>
      <title>Re: RS485 console setup and M-core not working after linux Boot.</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/RS485-console-setup-and-M-core-not-working-after-linux-Boot/m-p/2024221#M27044</link>
      <description>&lt;P&gt;HI &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/241286"&gt;@ajaysinh9484&lt;/a&gt;!&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;I am able to use the UART1 without problem.&lt;/P&gt;
&lt;P&gt;I attached the video and my u-boot environment for reference, I am using the iMX8MM-EVK.&lt;/P&gt;
&lt;P&gt;I have compiled the boot loader with the changes mentioned in ATF and I can run the &lt;STRONG&gt;prepare_mcore&lt;/STRONG&gt; command.&lt;/P&gt;
&lt;P&gt;Try to compile using the source code allowed in NXP official repository.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;STRONG&gt;M core example:&lt;/STRONG&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;LI-CODE lang="markup"&gt;/*
 * Copyright (c) 2016, Freescale Semiconductor, Inc.
 * Copyright 2016-2017 NXP
 * All rights reserved.
 *
 * SPDX-License-Identifier: BSD-3-Clause
 */

#include "pin_mux.h"
#include "clock_config.h"
#include "board.h"
#include "fsl_uart.h"

/*******************************************************************************
 * Definitions
 ******************************************************************************/
#define DEMO_UART          UART1
#define DEMO_UART_CLK_FREQ BOARD_DEBUG_UART_CLK_FREQ
#define DEMO_UART_BAUDRATE 115200U

/*******************************************************************************
 * Prototypes
 ******************************************************************************/

/*******************************************************************************
 * Variables
 ******************************************************************************/

uint8_t txbuff[]   = "Uart polling example\r\nBoard will send back received characters\r\n";
uint8_t rxbuff[20] = {0};
/*******************************************************************************
 * Code
 ******************************************************************************/
/*!
 * @brief Main function
 */
int main(void)
{
    uint8_t ch = "A";
    status_t status;
    uart_config_t config;

    /* Board specific RDC settings */
    BOARD_RdcInit();

    BOARD_InitBootPins();
    BOARD_BootClockRUN();
    BOARD_InitMemory();

    /*
     * config.baudRate_Bps = 115200U;
     * config.parityMode = kUART_ParityDisabled;
     * config.dataBitsCount = kUART_EightDataBits;
     * config.stopBitCount = kUART_OneStopBit;
     * config.txFifoWatermark = 2;
     * config.rxFifoWatermark = 1;
     * config.enableTx = false;
     * config.enableRx = false;
     */
    UART_GetDefaultConfig(&amp;amp;config);
    config.baudRate_Bps = DEMO_UART_BAUDRATE;
    config.enableTx     = true;
    config.enableRx     = true;

    status = UART_Init(DEMO_UART, &amp;amp;config, DEMO_UART_CLK_FREQ);
    if (kStatus_Success != status)
    {
        return kStatus_Fail;
    }

    while (1)
    {
        UART_WriteBlocking(DEMO_UART, &amp;amp;ch, 1);
    }
}
&lt;/LI-CODE&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Best Regards!&lt;/P&gt;
&lt;P&gt;Chavira&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 08 Jan 2025 17:53:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/RS485-console-setup-and-M-core-not-working-after-linux-Boot/m-p/2024221#M27044</guid>
      <dc:creator>Chavira</dc:creator>
      <dc:date>2025-01-08T17:53:50Z</dc:date>
    </item>
    <item>
      <title>Re: RS485 console setup and M-core not working after linux Boot.</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/RS485-console-setup-and-M-core-not-working-after-linux-Boot/m-p/2024866#M27062</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/206761"&gt;@Chavira&lt;/a&gt;&amp;nbsp;&lt;BR /&gt;&lt;BR /&gt;Thank you for your response, but I believe there may be some misunderstanding regarding the issue. Let me clarify the configuration and the observed behaviour:&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;&lt;P&gt;&lt;STRONG&gt;Configuration Summary:&lt;/STRONG&gt;&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;&lt;STRONG&gt;UART4&lt;/STRONG&gt; is configured as the M-core console.&lt;/LI&gt;&lt;LI&gt;&lt;STRONG&gt;UART1&lt;/STRONG&gt; is configured for RS-485 communication in the M-core, with the following pin mappings:&lt;UL&gt;&lt;LI&gt;Pin 202 (UART1 TX) connected to RS-485 RDI.&lt;/LI&gt;&lt;LI&gt;Pin 204 (UART1 RX) connected to RS-485 RO.&lt;/LI&gt;&lt;LI&gt;Pin 208 (UART3 RXD) connected to RS-485 RE/DE for direction control.&lt;/LI&gt;&lt;/UL&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P&gt;&lt;STRONG&gt;Behavior Observed:&lt;/STRONG&gt;&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;&lt;STRONG&gt;The communication between RS-485 and the M-core console works correctly when the application runs in U-Boot.&lt;/STRONG&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/LI&gt;&lt;LI&gt;&lt;STRONG&gt;However, after booting into Linux, the RS-485 communication stops working.&lt;/STRONG&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;/LI&gt;&lt;LI&gt;&lt;P&gt;&lt;STRONG&gt;Attempted Solution Based on Your Suggestion:&lt;/STRONG&gt;&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;I modified the ATF source as follows:&lt;DIV class=""&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV class=""&gt;&lt;SPAN&gt;RDC_PDAPn(RDC_PDAP_UART1, D0R | D0W)&lt;/SPAN&gt;&lt;/DIV&gt;&lt;/DIV&gt;to&lt;DIV class=""&gt;&lt;DIV class=""&gt;RDC_PDAPn(RDC_PDAP_UART1, D1R | D1W)&lt;/DIV&gt;&lt;/DIV&gt;&lt;/LI&gt;&lt;LI&gt;Despite making this change, the issue persists, and RS-485 communication does not function in Linux.&lt;BR /&gt;&lt;BR /&gt;&lt;P&gt;I would appreciate your guidance on further steps to resolve this issue, especially if there are any other areas in the ATF, U-Boot, or Linux configurations that might need adjustments.&lt;/P&gt;&lt;P&gt;Looking forward to your feedback.&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;/LI&gt;&lt;/OL&gt;</description>
      <pubDate>Thu, 09 Jan 2025 13:28:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/RS485-console-setup-and-M-core-not-working-after-linux-Boot/m-p/2024866#M27062</guid>
      <dc:creator>ajaysinh9484</dc:creator>
      <dc:date>2025-01-09T13:28:13Z</dc:date>
    </item>
    <item>
      <title>Re: RS485 console setup and M-core not working after linux Boot.</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/RS485-console-setup-and-M-core-not-working-after-linux-Boot/m-p/2025057#M27066</link>
      <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/241286"&gt;@ajaysinh9484&lt;/a&gt;!&lt;/P&gt;
&lt;P&gt;I understand the problem, the UART1 is not working after the linux is booting.&lt;/P&gt;
&lt;P&gt;As you see in the video that I sent after the configurations that I made the UART1 is working after Linux boot.&lt;/P&gt;
&lt;P&gt;I can't connect any peripheral or RS485 module to my board because is the UART for the BT module but as we can see the UART all the time.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;You have to note that the modification sin ATF should be in &lt;A href="https://github.com/nxp-imx/imx-atf/blob/lf_v2.6/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c#L113" target="_self"&gt;line 113&lt;/A&gt; and &lt;A href="https://github.com/nxp-imx/imx-atf/blob/lf_v2.6/plat/imx/imx8m/imx8mm/imx8mm_bl31_setup.c#L66" target="_self"&gt;line 66.&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 09 Jan 2025 18:28:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/RS485-console-setup-and-M-core-not-working-after-linux-Boot/m-p/2025057#M27066</guid>
      <dc:creator>Chavira</dc:creator>
      <dc:date>2025-01-09T18:28:53Z</dc:date>
    </item>
  </channel>
</rss>

