Other NXP ProductsのトピックUM10944 (SJA1105TEL) error in Clock selection Matrix: MIII4_RGMII_TX_CLK support for PLL0 missing https://community.nxp.com/t5/Other-NXP-Products/UM10944-SJA1105TEL-error-in-Clock-selection-Matrix-MIII4-RGMII/m-p/1991962#M26334 <P>In UM10944 table 79 on page 67 the clock selection matrix states allowed CLKSRC selections.<BR />Therein a bit has been set in the wrong line:<BR />Instead of MIII4_RMII_TX_CLK, the bit 'a' should be set in the line of&nbsp;MIII4_RGMII_TX_CLK.</P> Mon, 11 Nov 2024 12:21:01 GMT GlennKessler 2024-11-11T12:21:01Z UM10944 (SJA1105TEL) error in Clock selection Matrix: MIII4_RGMII_TX_CLK support for PLL0 missing https://community.nxp.com/t5/Other-NXP-Products/UM10944-SJA1105TEL-error-in-Clock-selection-Matrix-MIII4-RGMII/m-p/1991962#M26334 <P>In UM10944 table 79 on page 67 the clock selection matrix states allowed CLKSRC selections.<BR />Therein a bit has been set in the wrong line:<BR />Instead of MIII4_RMII_TX_CLK, the bit 'a' should be set in the line of&nbsp;MIII4_RGMII_TX_CLK.</P> Mon, 11 Nov 2024 12:21:01 GMT https://community.nxp.com/t5/Other-NXP-Products/UM10944-SJA1105TEL-error-in-Clock-selection-Matrix-MIII4-RGMII/m-p/1991962#M26334 GlennKessler 2024-11-11T12:21:01Z