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    <title>topic PIN multiplexing in LPC in Other NXP Products</title>
    <link>https://community.nxp.com/t5/Other-NXP-Products/PIN-multiplexing-in-LPC/m-p/218689#M2614</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello everybody,&lt;/P&gt;&lt;P&gt;I'm supporting our hardware engineer for our design which uses MPC5125, and we are dealing with the LPC (Local Plus Bus Controller).&lt;/P&gt;&lt;P&gt;We need to connect 8 peripherals on this bus, and some of them are 128 MByte Flash memories, so we need this bus configuration:&lt;/P&gt;&lt;P&gt;Data Bus: 16 bit&lt;BR /&gt;Address Bus: 26 bit (probably short-addressing mode, but may also be byte-addressing mode﻿)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I saw that there are 8 Chip Select signals (CSx), but some of them are multiplexed with the LPC Address Signals, so only a subset is really available.&lt;/P&gt;&lt;P&gt;Does anybody know how many Chip Select signals are available in this configuration (16 + 26)?&lt;/P&gt;&lt;P&gt;I also noticed that the CS0 signal, which carries the information about the boot device, is multiplexed with the ACK/BURST signal, do you know if the LPC works properly even without the ACK/BURST signal?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;We are using NOR Flash devices, so we can't use the NAND Flash Controller, which could be very useful in this case, but this choice is out of my scope!&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks in advance to everybody who could help me on this matter.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Fabrizio&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 30 Jun 2011 16:04:53 GMT</pubDate>
    <dc:creator>painofab</dc:creator>
    <dc:date>2011-06-30T16:04:53Z</dc:date>
    <item>
      <title>PIN multiplexing in LPC</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/PIN-multiplexing-in-LPC/m-p/218689#M2614</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello everybody,&lt;/P&gt;&lt;P&gt;I'm supporting our hardware engineer for our design which uses MPC5125, and we are dealing with the LPC (Local Plus Bus Controller).&lt;/P&gt;&lt;P&gt;We need to connect 8 peripherals on this bus, and some of them are 128 MByte Flash memories, so we need this bus configuration:&lt;/P&gt;&lt;P&gt;Data Bus: 16 bit&lt;BR /&gt;Address Bus: 26 bit (probably short-addressing mode, but may also be byte-addressing mode﻿)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I saw that there are 8 Chip Select signals (CSx), but some of them are multiplexed with the LPC Address Signals, so only a subset is really available.&lt;/P&gt;&lt;P&gt;Does anybody know how many Chip Select signals are available in this configuration (16 + 26)?&lt;/P&gt;&lt;P&gt;I also noticed that the CS0 signal, which carries the information about the boot device, is multiplexed with the ACK/BURST signal, do you know if the LPC works properly even without the ACK/BURST signal?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;We are using NOR Flash devices, so we can't use the NAND Flash Controller, which could be very useful in this case, but this choice is out of my scope!&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks in advance to everybody who could help me on this matter.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Fabrizio&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 30 Jun 2011 16:04:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/PIN-multiplexing-in-LPC/m-p/218689#M2614</guid>
      <dc:creator>painofab</dc:creator>
      <dc:date>2011-06-30T16:04:53Z</dc:date>
    </item>
    <item>
      <title>Re: PIN multiplexing in LPC</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/PIN-multiplexing-in-LPC/m-p/218690#M2615</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;You may need to use external address decoders to "fan out" one or more of the chip-selects.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Tom&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 01 Jul 2011 12:12:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/PIN-multiplexing-in-LPC/m-p/218690#M2615</guid>
      <dc:creator>TomE</dc:creator>
      <dc:date>2011-07-01T12:12:47Z</dc:date>
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