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    <title>Other NXP ProductsのトピックSPI Triggered by GPIO</title>
    <link>https://community.nxp.com/t5/Other-NXP-Products/SPI-Triggered-by-GPIO/m-p/1809256#M21149</link>
    <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;my device is MK64FN1m0xxx12.&lt;/P&gt;&lt;P&gt;i try to configue SPI2 triggered by GPIOC pin 15 with SPI2 Rx and Tx DMA.&lt;/P&gt;&lt;P&gt;I configure as follow:&lt;/P&gt;&lt;DIV&gt;#define ADS1299_SPI_CHANNEL (SPI_CH_2)&lt;/DIV&gt;&lt;DIV&gt;#define ADS1299_CONFIGURATION_BAUD (1000000)&lt;/DIV&gt;&lt;DIV&gt;#define ADS1299_SAMPLING_BAUD (8000000)&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;#define ADS1299_MAX_BYTE_IN_FRAME (27)&lt;/DIV&gt;&lt;DIV&gt;#define ADS1299_MAX_FRAME (64)&lt;/DIV&gt;&lt;DIV&gt;#define ADS1299_MAX_BYTE_IN_PACKET (MAX_BYTE_IN_FRAME * MAX_FRAME)&lt;/DIV&gt;&lt;DIV&gt;#define ADS1299_MAX_SAMPLE_IN_PACKET (MAX_BYTE_IN_PACKET / 3)&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;#define ADS1299_MAX_PACKET_TCD_POOL (ADS1299_MAX_FRAME)&lt;/DIV&gt;&lt;DIV&gt;#define ADS1299_MAX_BYTE_IN_BLOCK (ADS1299_MAX_BYTE_IN_FRAME)&lt;/DIV&gt;&lt;DIV&gt;#define ADS1299_MAX_SAMPLE_PACKET (2)&lt;/DIV&gt;&lt;DIV&gt;#define ADS1299_MAX_SPI_TCD_POOL (ADS1299_MAX_SAMPLE_PACKET * ADS1299_MAX_PACKET_TCD_POOL)&lt;/DIV&gt;&lt;DIV&gt;U8&amp;nbsp; &amp;nbsp;SampleBlock[2][64 * 27] ;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; SPI_CH_2&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; edma_handle_t Rx ;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; edma_handle_t Tx ;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; edma_transfer_config_t TxTransferConfig = {0};&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; edma_transfer_config_t RxTransferConfig = {0};&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; AT_QUICKACCESS_SECTION_DATA_ALIGN( edma_tcd_t Tcd_SpiTxMemoryPool[ADS1299_MAX_SPI_TCD_POOL + 1] , sizeof(edma_tcd_t) );&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; AT_QUICKACCESS_SECTION_DATA_ALIGN( edma_tcd_t Tcd_SpiRxMemoryPool[ADS1299_MAX_SPI_TCD_POOL + 1] , sizeof(edma_tcd_t) );&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;//Code //&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; DMAMUX_SetSource ( DMAMUX0, 11, kDmaRequestMux0PortC );&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; DMAMUX_EnableChannel ( DMAMUX0, 11 );&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; EDMA_CreateHandle ( &amp;amp;Tx, DMA0, 11 );&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; EDMA_ResetChannel ( DMA0, 11 );&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; DMAMUX_SetSource ( DMAMUX0, 9, kDmaRequestMux0SPI2 );&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; DMAMUX_EnableChannel ( DMAMUX0, 9 );&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; EDMA_CreateHandle ( &amp;amp;Rx, DMA0, 9 );&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; EDMA_ResetChannel ( DMA0, 9 );&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; EDMA_SetCallback ( &amp;amp;Rx, DMACallback, NULL );&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; U8 NextIndex = 0 ;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; U8 TcdPoolForMemory = ADS1299_MAX_FRAME ; //8 / 2 double buffer&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; U8 TcdMemoryPoolIndex = 0 ;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; U8 MemporyPoolIndex = 0 ;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; U8 MemoryForPoolSize = ADS1299_MAX_BYTE_IN_FRAME ;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; for( U8 i = 0 ; i &amp;lt; 2 ; i++ ){&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;if( NextIndex + 1 &amp;gt;= 2 )NextIndex = 0 ;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;else NextIndex++ ;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;EDMA_PrepareTransfer ( pSPITxTransferConfig , SampleBlock + MemoryForPoolSize * i , 1 , &amp;amp;SPI2-&amp;gt;PUSHR ,&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; 1 , 1 , MemoryForPoolSize , kEDMA_MemoryToPeripheral );&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;EDMA_TcdSetTransferConfig ( &amp;amp;Tcd_SpiTxMemoryPool[i], pSPITxTransferConfig, &amp;amp;Tcd_SpiTxMemoryPool[NextIndex] );&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; EDMA_PrepareTransfer ( pSPIRxTransferConfig, &amp;amp;SPI2-&amp;gt;POPR, 1 , SampleBlock&amp;nbsp; + MemoryForPoolSize * i ,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; 1 &amp;nbsp; , 1, MemoryForPoolSize , kEDMA_PeripheralToMemory );&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; EDMA_TcdSetTransferConfig ( &amp;amp;Tcd_SpiRxMemoryPool[i], pSPIRxTransferConfig, &amp;amp;Tcd_SpiRxMemoryPool[NextIndex] );&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; if( (++TcdMemoryPoolIndex != 0) &amp;amp;&amp;amp; !(TcdMemoryPoolIndex % TcdPoolForMemory) ){&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; EDMA_TcdEnableInterrupts( &amp;amp;Tcd_SpiRxMemoryPool[i], kEDMA_MajorInterruptEnable ) ;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; TcdMemoryPoolIndex = 0 ;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; MemporyPoolIndex++ ;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; }&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; }&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; EDMA_InstallTCD ( DMA0, 11, &amp;amp;Tcd_SpiTxMemoryPool[0] );&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; EDMA_StartTransfer ( &amp;amp;Tx );&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; EDMA_InstallTCD ( DMA0, 9, &amp;amp;Tcd_SpiRxMemoryPool[0] );&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; EDMA_StartTransfer ( &amp;amp;Rx );&lt;/DIV&gt;&lt;DIV&gt;what im doing wrong?&lt;/DIV&gt;&lt;DIV&gt;advice&lt;/DIV&gt;</description>
    <pubDate>Thu, 15 Feb 2024 16:50:50 GMT</pubDate>
    <dc:creator>Asaf</dc:creator>
    <dc:date>2024-02-15T16:50:50Z</dc:date>
    <item>
      <title>SPI Triggered by GPIO</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/SPI-Triggered-by-GPIO/m-p/1809256#M21149</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;my device is MK64FN1m0xxx12.&lt;/P&gt;&lt;P&gt;i try to configue SPI2 triggered by GPIOC pin 15 with SPI2 Rx and Tx DMA.&lt;/P&gt;&lt;P&gt;I configure as follow:&lt;/P&gt;&lt;DIV&gt;#define ADS1299_SPI_CHANNEL (SPI_CH_2)&lt;/DIV&gt;&lt;DIV&gt;#define ADS1299_CONFIGURATION_BAUD (1000000)&lt;/DIV&gt;&lt;DIV&gt;#define ADS1299_SAMPLING_BAUD (8000000)&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;#define ADS1299_MAX_BYTE_IN_FRAME (27)&lt;/DIV&gt;&lt;DIV&gt;#define ADS1299_MAX_FRAME (64)&lt;/DIV&gt;&lt;DIV&gt;#define ADS1299_MAX_BYTE_IN_PACKET (MAX_BYTE_IN_FRAME * MAX_FRAME)&lt;/DIV&gt;&lt;DIV&gt;#define ADS1299_MAX_SAMPLE_IN_PACKET (MAX_BYTE_IN_PACKET / 3)&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;#define ADS1299_MAX_PACKET_TCD_POOL (ADS1299_MAX_FRAME)&lt;/DIV&gt;&lt;DIV&gt;#define ADS1299_MAX_BYTE_IN_BLOCK (ADS1299_MAX_BYTE_IN_FRAME)&lt;/DIV&gt;&lt;DIV&gt;#define ADS1299_MAX_SAMPLE_PACKET (2)&lt;/DIV&gt;&lt;DIV&gt;#define ADS1299_MAX_SPI_TCD_POOL (ADS1299_MAX_SAMPLE_PACKET * ADS1299_MAX_PACKET_TCD_POOL)&lt;/DIV&gt;&lt;DIV&gt;U8&amp;nbsp; &amp;nbsp;SampleBlock[2][64 * 27] ;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; SPI_CH_2&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; edma_handle_t Rx ;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; edma_handle_t Tx ;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; edma_transfer_config_t TxTransferConfig = {0};&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; edma_transfer_config_t RxTransferConfig = {0};&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; AT_QUICKACCESS_SECTION_DATA_ALIGN( edma_tcd_t Tcd_SpiTxMemoryPool[ADS1299_MAX_SPI_TCD_POOL + 1] , sizeof(edma_tcd_t) );&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; AT_QUICKACCESS_SECTION_DATA_ALIGN( edma_tcd_t Tcd_SpiRxMemoryPool[ADS1299_MAX_SPI_TCD_POOL + 1] , sizeof(edma_tcd_t) );&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;//Code //&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; DMAMUX_SetSource ( DMAMUX0, 11, kDmaRequestMux0PortC );&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; DMAMUX_EnableChannel ( DMAMUX0, 11 );&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; EDMA_CreateHandle ( &amp;amp;Tx, DMA0, 11 );&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; EDMA_ResetChannel ( DMA0, 11 );&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; DMAMUX_SetSource ( DMAMUX0, 9, kDmaRequestMux0SPI2 );&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; DMAMUX_EnableChannel ( DMAMUX0, 9 );&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; EDMA_CreateHandle ( &amp;amp;Rx, DMA0, 9 );&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; EDMA_ResetChannel ( DMA0, 9 );&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; EDMA_SetCallback ( &amp;amp;Rx, DMACallback, NULL );&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; U8 NextIndex = 0 ;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; U8 TcdPoolForMemory = ADS1299_MAX_FRAME ; //8 / 2 double buffer&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; U8 TcdMemoryPoolIndex = 0 ;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; U8 MemporyPoolIndex = 0 ;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; U8 MemoryForPoolSize = ADS1299_MAX_BYTE_IN_FRAME ;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; for( U8 i = 0 ; i &amp;lt; 2 ; i++ ){&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;if( NextIndex + 1 &amp;gt;= 2 )NextIndex = 0 ;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;else NextIndex++ ;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;EDMA_PrepareTransfer ( pSPITxTransferConfig , SampleBlock + MemoryForPoolSize * i , 1 , &amp;amp;SPI2-&amp;gt;PUSHR ,&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;&amp;nbsp; 1 , 1 , MemoryForPoolSize , kEDMA_MemoryToPeripheral );&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;EDMA_TcdSetTransferConfig ( &amp;amp;Tcd_SpiTxMemoryPool[i], pSPITxTransferConfig, &amp;amp;Tcd_SpiTxMemoryPool[NextIndex] );&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; EDMA_PrepareTransfer ( pSPIRxTransferConfig, &amp;amp;SPI2-&amp;gt;POPR, 1 , SampleBlock&amp;nbsp; + MemoryForPoolSize * i ,&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; 1 &amp;nbsp; , 1, MemoryForPoolSize , kEDMA_PeripheralToMemory );&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; EDMA_TcdSetTransferConfig ( &amp;amp;Tcd_SpiRxMemoryPool[i], pSPIRxTransferConfig, &amp;amp;Tcd_SpiRxMemoryPool[NextIndex] );&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; if( (++TcdMemoryPoolIndex != 0) &amp;amp;&amp;amp; !(TcdMemoryPoolIndex % TcdPoolForMemory) ){&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; EDMA_TcdEnableInterrupts( &amp;amp;Tcd_SpiRxMemoryPool[i], kEDMA_MajorInterruptEnable ) ;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; TcdMemoryPoolIndex = 0 ;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; MemporyPoolIndex++ ;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; &amp;nbsp; }&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; }&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; EDMA_InstallTCD ( DMA0, 11, &amp;amp;Tcd_SpiTxMemoryPool[0] );&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; EDMA_StartTransfer ( &amp;amp;Tx );&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; EDMA_InstallTCD ( DMA0, 9, &amp;amp;Tcd_SpiRxMemoryPool[0] );&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp; EDMA_StartTransfer ( &amp;amp;Rx );&lt;/DIV&gt;&lt;DIV&gt;what im doing wrong?&lt;/DIV&gt;&lt;DIV&gt;advice&lt;/DIV&gt;</description>
      <pubDate>Thu, 15 Feb 2024 16:50:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/SPI-Triggered-by-GPIO/m-p/1809256#M21149</guid>
      <dc:creator>Asaf</dc:creator>
      <dc:date>2024-02-15T16:50:50Z</dc:date>
    </item>
    <item>
      <title>Re: SPI Triggered by GPIO</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/SPI-Triggered-by-GPIO/m-p/1809264#M21150</link>
      <description>&lt;P&gt;more detiles i get data ready GPIOC pin 15 foling hadge and then i need to read 27 bytes.&lt;/P&gt;&lt;P&gt;i have two buffers each buffer size of 64 * 27&lt;/P&gt;&lt;P&gt;each tcd read 27 bytes i have 64 tcd for each buffer&lt;/P&gt;</description>
      <pubDate>Thu, 15 Feb 2024 16:53:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/SPI-Triggered-by-GPIO/m-p/1809264#M21150</guid>
      <dc:creator>Asaf</dc:creator>
      <dc:date>2024-02-15T16:53:37Z</dc:date>
    </item>
    <item>
      <title>Re: SPI Triggered by GPIO</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/SPI-Triggered-by-GPIO/m-p/1813017#M21286</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;I would recommend taking as a base the edma_b2b_transfer SDK example. You can take it as a base, but modify it to meet your requirements.&lt;/P&gt;
&lt;P&gt;I apologize, but we do not have an example that fits your requirements. The customization of the example should be done by each customer.&lt;/P&gt;
&lt;P&gt;Also, maybe this community post might be helpful: &lt;A href="https://community.nxp.com/t5/Kinetis-Microcontrollers/Using-the-DMA-module-in-Kinetis-Devices/ta-p/1107248" target="_blank"&gt;Using the DMA module in Kinetis Devices - NXP Community&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Ricardo&lt;/P&gt;</description>
      <pubDate>Wed, 21 Feb 2024 17:52:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/SPI-Triggered-by-GPIO/m-p/1813017#M21286</guid>
      <dc:creator>Ricardo_Zamora</dc:creator>
      <dc:date>2024-02-21T17:52:53Z</dc:date>
    </item>
    <item>
      <title>Re: SPI Triggered by GPIO</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/SPI-Triggered-by-GPIO/m-p/1814507#M21326</link>
      <description>&lt;P&gt;I didnt found example of gpio trigger dma that work on k64fn1m0xxx12&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;i will be glad for real example for gpio trigger dma for spi2&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Advice thanks&lt;/STRONG&gt;&lt;/P&gt;</description>
      <pubDate>Fri, 23 Feb 2024 09:13:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/SPI-Triggered-by-GPIO/m-p/1814507#M21326</guid>
      <dc:creator>Asaf</dc:creator>
      <dc:date>2024-02-23T09:13:30Z</dc:date>
    </item>
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