topic Re: SPT pdma operation issue in Other NXP Products

SPT pdma operation issue

MINGYU — Tue, 30 Jan 2024 07:02:20 GMT

Hi.
I have a question about the operation SPT pdma to dram.
Due to the nature of RAM, I know that the same amount of time must be consumed when accessing a random address, but when writing data to dram with SPT's pdma, the time consumed increases as the value of the skip option increases.
Can you tell me if you know about this phenomenon and if so how to fix it?
Currently testing with S32R45 EVB.
Thank you.

Re: SPT pdma operation issue

petervlna — Wed, 31 Jan 2024 07:53:26 GMT

Hello,

I have contact our RADAR team.

I will feedback you ASAP.

Best regards,

Peter

Re: SPT pdma operation issue

petervlna — Thu, 01 Feb 2024 08:11:15 GMT

Hello,

For PDMA writing DRAM , it is different from SRAM, the access will be low efficient in skip mode indeed, which means writing OPRAM directly into DDR has serious throughput degradation when SKIP_ADDR!=0.
There are two modes that SPT writing to DDR.

1.continuous mode (SKIP_ADDR=0). In this mode, it is suggested to use SPT PDMA to write from OPRAM to DDR directly for high throughput;

2.skip mode (SKIP_ADDR!=0). In this mode, suggest two stage: 1) SPT PDMA to write from OPRAM to SRAM; 2) after the data is all stored in SRAM, trigger a FastDMA to move from SRAM into DDR.

Best regards,

Peter

Re: SPT pdma operation issue

WenChao — Fri, 24 May 2024 02:03:13 GMT

Do you have a demo code for the second method? range fft is so fast and how to triiger a fastdma?