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    <title>Other NXP Products中的主题 SBC FS26 FS0B and RSTB</title>
    <link>https://community.nxp.com/t5/Other-NXP-Products/SBC-FS26-FS0B-and-RSTB/m-p/1769464#M20366</link>
    <description>&lt;P&gt;While taking the SBC Test, a question arose.&lt;BR /&gt;When I set the SBC as shown below and stopped WD Refresh, I expected that only FS0B would drop to Low, but both FS0B and RSTB dropped to Low.&lt;BR /&gt;Can you tell me what causes RSTB to drop to low?&lt;BR /&gt;(For reference, in the settings below&lt;BR /&gt;When changing from SBC_FS26_FS_WD_FS_REACTION_FS0B&amp;nbsp;to SBC_FS26_FS_WD_FS_REACTION_NO_EFFECT, RSTB does not drop to Low.)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;static Sbc_fs26_InitConfigType sbcInitConfig =&lt;BR /&gt;{&lt;BR /&gt;/* FS_I_OVUV_SAFE_REACTION1 register */&lt;BR /&gt;{&lt;BR /&gt;SBC_FS26_FS_VMON_PRE_OV_FS_REACTION_NO_EFFECT,&lt;BR /&gt;SBC_FS26_FS_VMON_PRE_UV_FS_REACTION_NO_EFFECT,&lt;BR /&gt;SBC_FS26_FS_VMON_CORE_OV_FS_REACTION_NO_EFFECT,&lt;BR /&gt;SBC_FS26_FS_VMON_CORE_UV_FS_REACTION_NO_EFFECT,&lt;BR /&gt;SBC_FS26_FS_VMON_LDO1_OV_FS_REACTION_NO_EFFECT,&lt;BR /&gt;SBC_FS26_FS_VMON_LDO1_UV_FS_REACTION_NO_EFFECT,&lt;BR /&gt;SBC_FS26_FS_VMON_LDO2_OV_FS_REACTION_NO_EFFECT,&lt;BR /&gt;SBC_FS26_FS_VMON_LDO2_UV_FS_REACTION_NO_EFFECT&lt;BR /&gt;},&lt;BR /&gt;/* FS_I_OVUV_SAFE_REACTION2 register */&lt;BR /&gt;{&lt;BR /&gt;SBC_FS26_FS_VMON_EXT_OV_FS_REACTION_NO_EFFECT,&lt;BR /&gt;SBC_FS26_FS_VMON_EXT_UV_FS_REACTION_NO_EFFECT,&lt;BR /&gt;SBC_FS26_FS_VMON_REF_OV_FS_REACTION_NO_EFFECT,&lt;BR /&gt;SBC_FS26_FS_VMON_REF_UV_FS_REACTION_NO_EFFECT,&lt;BR /&gt;SBC_FS26_FS_VMON_TRK2_OV_FS_REACTION_NO_EFFECT,&lt;BR /&gt;SBC_FS26_FS_VMON_TRK2_UV_FS_REACTION_NO_EFFECT,&lt;BR /&gt;SBC_FS26_FS_VMON_TRK1_OV_FS_REACTION_NO_EFFECT,&lt;BR /&gt;SBC_FS26_FS_VMON_TRK1_UV_FS_REACTION_NO_EFFECT&lt;BR /&gt;},&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;/* FS_I_WD_CFG register */&lt;BR /&gt;{&lt;BR /&gt;SBC_FS26_FS_WD_ERR_LIMIT_6,&lt;BR /&gt;SBC_FS26_FS_WD_RFR_LIMIT_1,&lt;BR /&gt;&lt;STRONG&gt;SBC_FS26_FS_WD_FS_REACTION_FS0B&lt;/STRONG&gt;&lt;BR /&gt;},&lt;BR /&gt;&lt;BR /&gt;/* FS_I_SAFE_INPUTS register */&lt;BR /&gt;{&lt;BR /&gt;SBC_FS26_FS_FCCU_CFG_NO,&lt;BR /&gt;SBC_FS26_FS_FCCU12_FLT_POL_0_1,&lt;BR /&gt;SBC_FS26_FS_FCCU1_FLT_POL_LOW,&lt;BR /&gt;SBC_FS26_FS_FCCU2_FLT_POL_LOW,&lt;BR /&gt;SBC_FS26_FS_FCCU12_FS_REACTION_FS0B,&lt;BR /&gt;SBC_FS26_FS_FCCU1_FS_REACTION_FS0B,&lt;BR /&gt;SBC_FS26_FS_FCCU2_FS_REACTION_FS0B,&lt;BR /&gt;SBC_FS26_FS_WAKE2_LP_POLARITY_LOW,&lt;BR /&gt;SBC_FS26_FS_ERRMON_FLT_POLARITY_LOW,&lt;BR /&gt;SBC_FS26_FS_ERRMON_ACK_TIME_8MS,&lt;BR /&gt;SBC_FS26_FS_ERRMON_FS_REACTION_FS0B,&lt;BR /&gt;SBC_FS26_FS_FCCU12_FILT_6US&lt;BR /&gt;},&lt;BR /&gt;/* FS_I_FSSM register */&lt;BR /&gt;{&lt;BR /&gt;SBC_FS26_FS_FLT_ERR_CNT_LIMIT_6,&lt;BR /&gt;SBC_FS26_FS_FLT_ERR_REACTION_NO_EFFECT,&lt;BR /&gt;SBC_FS26_FS_RSTB_DUR_10MS,&lt;BR /&gt;SBC_FS26_FS_BACKUP_SAFETY_PATH_FS0B_NO,&lt;BR /&gt;SBC_FS26_FS_BACKUP_SAFETY_PATH_FS0B_NO,&lt;BR /&gt;SBC_FS26_FS_CLK_MON_DIS_ACTIVE,&lt;BR /&gt;SBC_FS26_FS_DIS8S_ENABLED&lt;BR /&gt;},&lt;BR /&gt;&lt;BR /&gt;/* FS_WDW_DURATION register */&lt;BR /&gt;{&lt;BR /&gt;SBC_FS26_FS_WDW_PERIOD_256MS,&lt;BR /&gt;SBC_FS26_FS_WDW_DC_31C_68O,&lt;BR /&gt;SBC_FS26_FS_WDW_RECOVERY_64MS&lt;BR /&gt;}&lt;BR /&gt;&lt;BR /&gt;};&lt;/P&gt;</description>
    <pubDate>Wed, 06 Dec 2023 05:13:28 GMT</pubDate>
    <dc:creator>kjy106906</dc:creator>
    <dc:date>2023-12-06T05:13:28Z</dc:date>
    <item>
      <title>SBC FS26 FS0B and RSTB</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/SBC-FS26-FS0B-and-RSTB/m-p/1769464#M20366</link>
      <description>&lt;P&gt;While taking the SBC Test, a question arose.&lt;BR /&gt;When I set the SBC as shown below and stopped WD Refresh, I expected that only FS0B would drop to Low, but both FS0B and RSTB dropped to Low.&lt;BR /&gt;Can you tell me what causes RSTB to drop to low?&lt;BR /&gt;(For reference, in the settings below&lt;BR /&gt;When changing from SBC_FS26_FS_WD_FS_REACTION_FS0B&amp;nbsp;to SBC_FS26_FS_WD_FS_REACTION_NO_EFFECT, RSTB does not drop to Low.)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;static Sbc_fs26_InitConfigType sbcInitConfig =&lt;BR /&gt;{&lt;BR /&gt;/* FS_I_OVUV_SAFE_REACTION1 register */&lt;BR /&gt;{&lt;BR /&gt;SBC_FS26_FS_VMON_PRE_OV_FS_REACTION_NO_EFFECT,&lt;BR /&gt;SBC_FS26_FS_VMON_PRE_UV_FS_REACTION_NO_EFFECT,&lt;BR /&gt;SBC_FS26_FS_VMON_CORE_OV_FS_REACTION_NO_EFFECT,&lt;BR /&gt;SBC_FS26_FS_VMON_CORE_UV_FS_REACTION_NO_EFFECT,&lt;BR /&gt;SBC_FS26_FS_VMON_LDO1_OV_FS_REACTION_NO_EFFECT,&lt;BR /&gt;SBC_FS26_FS_VMON_LDO1_UV_FS_REACTION_NO_EFFECT,&lt;BR /&gt;SBC_FS26_FS_VMON_LDO2_OV_FS_REACTION_NO_EFFECT,&lt;BR /&gt;SBC_FS26_FS_VMON_LDO2_UV_FS_REACTION_NO_EFFECT&lt;BR /&gt;},&lt;BR /&gt;/* FS_I_OVUV_SAFE_REACTION2 register */&lt;BR /&gt;{&lt;BR /&gt;SBC_FS26_FS_VMON_EXT_OV_FS_REACTION_NO_EFFECT,&lt;BR /&gt;SBC_FS26_FS_VMON_EXT_UV_FS_REACTION_NO_EFFECT,&lt;BR /&gt;SBC_FS26_FS_VMON_REF_OV_FS_REACTION_NO_EFFECT,&lt;BR /&gt;SBC_FS26_FS_VMON_REF_UV_FS_REACTION_NO_EFFECT,&lt;BR /&gt;SBC_FS26_FS_VMON_TRK2_OV_FS_REACTION_NO_EFFECT,&lt;BR /&gt;SBC_FS26_FS_VMON_TRK2_UV_FS_REACTION_NO_EFFECT,&lt;BR /&gt;SBC_FS26_FS_VMON_TRK1_OV_FS_REACTION_NO_EFFECT,&lt;BR /&gt;SBC_FS26_FS_VMON_TRK1_UV_FS_REACTION_NO_EFFECT&lt;BR /&gt;},&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;/* FS_I_WD_CFG register */&lt;BR /&gt;{&lt;BR /&gt;SBC_FS26_FS_WD_ERR_LIMIT_6,&lt;BR /&gt;SBC_FS26_FS_WD_RFR_LIMIT_1,&lt;BR /&gt;&lt;STRONG&gt;SBC_FS26_FS_WD_FS_REACTION_FS0B&lt;/STRONG&gt;&lt;BR /&gt;},&lt;BR /&gt;&lt;BR /&gt;/* FS_I_SAFE_INPUTS register */&lt;BR /&gt;{&lt;BR /&gt;SBC_FS26_FS_FCCU_CFG_NO,&lt;BR /&gt;SBC_FS26_FS_FCCU12_FLT_POL_0_1,&lt;BR /&gt;SBC_FS26_FS_FCCU1_FLT_POL_LOW,&lt;BR /&gt;SBC_FS26_FS_FCCU2_FLT_POL_LOW,&lt;BR /&gt;SBC_FS26_FS_FCCU12_FS_REACTION_FS0B,&lt;BR /&gt;SBC_FS26_FS_FCCU1_FS_REACTION_FS0B,&lt;BR /&gt;SBC_FS26_FS_FCCU2_FS_REACTION_FS0B,&lt;BR /&gt;SBC_FS26_FS_WAKE2_LP_POLARITY_LOW,&lt;BR /&gt;SBC_FS26_FS_ERRMON_FLT_POLARITY_LOW,&lt;BR /&gt;SBC_FS26_FS_ERRMON_ACK_TIME_8MS,&lt;BR /&gt;SBC_FS26_FS_ERRMON_FS_REACTION_FS0B,&lt;BR /&gt;SBC_FS26_FS_FCCU12_FILT_6US&lt;BR /&gt;},&lt;BR /&gt;/* FS_I_FSSM register */&lt;BR /&gt;{&lt;BR /&gt;SBC_FS26_FS_FLT_ERR_CNT_LIMIT_6,&lt;BR /&gt;SBC_FS26_FS_FLT_ERR_REACTION_NO_EFFECT,&lt;BR /&gt;SBC_FS26_FS_RSTB_DUR_10MS,&lt;BR /&gt;SBC_FS26_FS_BACKUP_SAFETY_PATH_FS0B_NO,&lt;BR /&gt;SBC_FS26_FS_BACKUP_SAFETY_PATH_FS0B_NO,&lt;BR /&gt;SBC_FS26_FS_CLK_MON_DIS_ACTIVE,&lt;BR /&gt;SBC_FS26_FS_DIS8S_ENABLED&lt;BR /&gt;},&lt;BR /&gt;&lt;BR /&gt;/* FS_WDW_DURATION register */&lt;BR /&gt;{&lt;BR /&gt;SBC_FS26_FS_WDW_PERIOD_256MS,&lt;BR /&gt;SBC_FS26_FS_WDW_DC_31C_68O,&lt;BR /&gt;SBC_FS26_FS_WDW_RECOVERY_64MS&lt;BR /&gt;}&lt;BR /&gt;&lt;BR /&gt;};&lt;/P&gt;</description>
      <pubDate>Wed, 06 Dec 2023 05:13:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/SBC-FS26-FS0B-and-RSTB/m-p/1769464#M20366</guid>
      <dc:creator>kjy106906</dc:creator>
      <dc:date>2023-12-06T05:13:28Z</dc:date>
    </item>
    <item>
      <title>Re: SBC FS26 FS0B and RSTB</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/SBC-FS26-FS0B-and-RSTB/m-p/1769608#M20369</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;SPAN&gt;Junyeong,&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;It is caused by no WD refresh during the 256ms INIT_FS state.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="image002.jpg" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/253182iF6BCAF74955174DE/image-size/large?v=v2&amp;amp;px=999" role="button" title="image002.jpg" alt="image002.jpg" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="image003.jpg" style="width: 628px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/253183i20ED2D13E7C47ACC/image-dimensions/628x729?v=v2" width="628" height="729" role="button" title="image003.jpg" alt="image003.jpg" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;Tomas&lt;/P&gt;</description>
      <pubDate>Wed, 06 Dec 2023 08:31:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/SBC-FS26-FS0B-and-RSTB/m-p/1769608#M20369</guid>
      <dc:creator>TomasVaverka</dc:creator>
      <dc:date>2023-12-06T08:31:23Z</dc:date>
    </item>
    <item>
      <title>Re: SBC FS26 FS0B and RSTB</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/SBC-FS26-FS0B-and-RSTB/m-p/1770265#M20380</link>
      <description>&lt;P&gt;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/12216"&gt;@TomasVaverka&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;hello&lt;/P&gt;&lt;P&gt;My explanation wasn't enough.&lt;BR /&gt;I went through the Init FS state with a normal WD Refresh and stopped WD Refresh after some time in Normal state.&lt;BR /&gt;Please check again and then respond.&lt;/P&gt;</description>
      <pubDate>Thu, 07 Dec 2023 00:55:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/SBC-FS26-FS0B-and-RSTB/m-p/1770265#M20380</guid>
      <dc:creator>kjy106906</dc:creator>
      <dc:date>2023-12-07T00:55:13Z</dc:date>
    </item>
    <item>
      <title>Re: SBC FS26 FS0B and RSTB</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/SBC-FS26-FS0B-and-RSTB/m-p/1770532#M20384</link>
      <description>&lt;P data-unlink="true"&gt;Hi&amp;nbsp;&lt;SPAN data-proxy-id="aura-pos-lib-1"&gt;Junyeong,&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;Please double check what value is assigned to SBC_FS26_FS_WD_FS_REACTION_FS0B.&lt;/P&gt;
&lt;P&gt;I would expect 1 and then as you correctly stated the RSTB pin should not be asserted low if WD_ERR_CNT[3:0] = WD_ERR_LIMIT[1:0].&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Capture.JPG" style="width: 769px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/253340iD3D5CDFFF627A231/image-size/large?v=v2&amp;amp;px=999" role="button" title="Capture.JPG" alt="Capture.JPG" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;Best regards,&lt;/P&gt;
&lt;P&gt;Tomas&lt;/P&gt;</description>
      <pubDate>Thu, 07 Dec 2023 08:09:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/SBC-FS26-FS0B-and-RSTB/m-p/1770532#M20384</guid>
      <dc:creator>TomasVaverka</dc:creator>
      <dc:date>2023-12-07T08:09:34Z</dc:date>
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