topic Re: MPC555 unhandled interrupt in Other NXP Products

MPC555 unhandled interrupt

Angus_scot_uk — Mon, 06 Nov 2023 16:45:05 GMT

We are using MPC555 Quick Start Code Exception handlers and the "unhandled interrupt" handler.

The code looks like the following:

void unhandledISR(void)
{
asm {
opword 0 /* debug */
}
}

When the "unhandled interrupt" is taken the CPU seems to stall (there is no debugger attached to the target hardware).

How does "opword 0" cause the CPU to halt?

After instrumenting the code (printf output to a UART) I found the following:

LEVEL_7_ISR
unhandledISR
SIVEC: 0x3C000000
IntSrc: 15
SIPEND: 0x00800000
SIMASK: 0x01D60000
UIPEND: 0x00000000
rB: 0x00000000
UMCR: 0x20000000

SIVEC: 0x3C000000 == Interrupt Code 15

and we end up in the unhandledISR() via the jump table entry.

Why would Interrupt Code 15 fire when

UIPEND: 0x00000000 and

SIPEND: 0x00800000

I'm confused.

Re: MPC555 unhandled interrupt

lukaszadrapa — Wed, 08 Nov 2023 09:37:33 GMT

Hi @Angus_scot_uk

on PowerPC, opcode 0 is used for software breakpoint. If a debugger is attached, execution of such opcode will cause entering to debug mode. If a debugger is not attached, it is executed as a NOP instruction. I do not have experience with this on MPC555 but I believe this is the same like on newer MPC5xxx devices.

Without a debugger, I would use endless loop in the handler or something like that.

When checking the registers, it looks like it is caused by IRQ4. UIPEND can be zero in this case. This is copied from application note AN2109:

Regards,

Lukas

Re: MPC555 unhandled interrupt

Angus_scot_uk — Wed, 08 Nov 2023 14:56:00 GMT

Hi @lukaszadrapa

Thank you for responding to my message.

Yes, on initial inspection it does look like IRQ4 is the interrupt cause, but, if it was IRQ4 then

SIVEC would have the value 0x2000 0000‬ (yes/no)?

We observe SIVEC == 0x3C000000 hence my confusion.

Regards

ASU