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    <title>topic Re: LS1046A RGMII MAC to MAC problem in Other NXP Products</title>
    <link>https://community.nxp.com/t5/Other-NXP-Products/LS1046A-RGMII-MAC-to-MAC-problem/m-p/1658972#M17911</link>
    <description>&lt;P&gt;&lt;SPAN&gt;In general, NXP designs to an attachment unit interface (AUI) specification (MII, GMII, RGMII, SGMII, etc.). &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;So in most cases, proper operation is achieved if the interface signal requirements (timings, IO levels, etc.) are met. &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;This includes PHYless designs as well. We recommend to operate with AN disabled since the speed is usually fixed.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Input Output Buffer Information Specification (IBIS) modeling can help determine signal degradation to/from our device across the interconnect.&lt;/SPAN&gt;&lt;/P&gt;</description>
    <pubDate>Mon, 29 May 2023 07:29:32 GMT</pubDate>
    <dc:creator>yipingwang</dc:creator>
    <dc:date>2023-05-29T07:29:32Z</dc:date>
    <item>
      <title>LS1046A RGMII MAC to MAC problem</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/LS1046A-RGMII-MAC-to-MAC-problem/m-p/1653482#M17802</link>
      <description>&lt;P&gt;I have a Broadcom BCM53158 RGMII MAC interface connected to LS1046A RGMII1(EC1 MAC3) via MAC to MAC method without PHY, but they unable to link up successful now.&lt;/P&gt;&lt;P&gt;I've checked the EC1 settings of RCW are correct and configured RGMII 1 as fixed-link 1G in kernel dts as below&lt;/P&gt;&lt;P&gt;&amp;amp;fman0 {&lt;BR /&gt;#if 1&lt;BR /&gt;ethernet@e4000 {&lt;BR /&gt;/* MAC3, ethaddr */&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;phy-connection-type = "rgmii-id";&lt;BR /&gt;status = "okay";&lt;BR /&gt;fixed-link {&lt;BR /&gt;speed = &amp;lt;1000&amp;gt;;&lt;BR /&gt;full-duplex;&lt;BR /&gt;};&lt;BR /&gt;};&lt;BR /&gt;#else&lt;BR /&gt;ethernet@e4000 {&lt;BR /&gt;phy-handle = &amp;lt;&amp;amp;rgmii_phy1&amp;gt;;&lt;BR /&gt;phy-connection-type = "rgmii-id";&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;#endif&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I also checked the&amp;nbsp;IF_MODE register of MAC3 and it's shown 1Gbps, forces full duplex and RGMII mode.&lt;/P&gt;&lt;P&gt;Could you help to check where is wrong about RGMII settings.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;#LS1046A&lt;/P&gt;</description>
      <pubDate>Fri, 19 May 2023 03:38:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/LS1046A-RGMII-MAC-to-MAC-problem/m-p/1653482#M17802</guid>
      <dc:creator>PatrickChen</dc:creator>
      <dc:date>2023-05-19T03:38:51Z</dc:date>
    </item>
    <item>
      <title>Re: LS1046A RGMII MAC to MAC problem</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/LS1046A-RGMII-MAC-to-MAC-problem/m-p/1658972#M17911</link>
      <description>&lt;P&gt;&lt;SPAN&gt;In general, NXP designs to an attachment unit interface (AUI) specification (MII, GMII, RGMII, SGMII, etc.). &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;So in most cases, proper operation is achieved if the interface signal requirements (timings, IO levels, etc.) are met. &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;This includes PHYless designs as well. We recommend to operate with AN disabled since the speed is usually fixed.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Input Output Buffer Information Specification (IBIS) modeling can help determine signal degradation to/from our device across the interconnect.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 29 May 2023 07:29:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/LS1046A-RGMII-MAC-to-MAC-problem/m-p/1658972#M17911</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2023-05-29T07:29:32Z</dc:date>
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