topic Re: TEF8102 Cascade Chirp Control problem in Other NXP Products

TEF8102 Cascade Chirp Control problem

jack_huang1 — Mon, 02 Jan 2023 00:57:43 GMT

Dears：

The product uses NXP TEF8102 program 5 pieces of cascade, after FPGA processing, the data is transferred to NXP S32R294 for transmission. Currently, when debugging TEF8102 cascade, it is found that the trigger pin control cannot be used. The specific information is as follows:

Below are instructions for configuring the trigger pin：

The register description is detailed below：

bit 1 display is not USED. How should I configure this register? Thanks!

Re: TEF8102 Cascade Chirp Control problem

guoweisun — Tue, 03 Jan 2023 02:00:08 GMT

Please submit ticket for this part question.

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Re: TEF8102 Cascade Chirp Control problem

jack_huang1 — Tue, 03 Jan 2023 02:53:07 GMT

Dear guoweisun:

I have submitted it on the CASE, CAS number: 00510005, thank you!