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    <title>topic Re: PTP default master profile configuration in Other NXP Products</title>
    <link>https://community.nxp.com/t5/Other-NXP-Products/PTP-default-master-profile-configuration/m-p/1563935#M16046</link>
    <description>&lt;P&gt;&lt;SPAN&gt;The first LS1046A board works as a boundary clock, you can refer to LSDK document "Chapter 8.7.5.2: Boundary clock verification" for the details how to run a boundary clock. &lt;/SPAN&gt;&lt;/P&gt;</description>
    <pubDate>Mon, 05 Dec 2022 01:57:53 GMT</pubDate>
    <dc:creator>yipingwang</dc:creator>
    <dc:date>2022-12-05T01:57:53Z</dc:date>
    <item>
      <title>PTP default master profile configuration</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/PTP-default-master-profile-configuration/m-p/1561965#M16019</link>
      <description>&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="jibin_0-1669805198936.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/202263iAF8CA7EA1DFD4DC8/image-size/medium?v=v2&amp;amp;px=400" role="button" title="jibin_0-1669805198936.png" alt="jibin_0-1669805198936.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;The first LS1046A is connected to the grandmaster via the fm1-mac9 optical interface (which serves as a slave to the grandmaster). The first LS1046A fm1-mac3 ethernet interface is used to daisy-chain the second LS1046A.&lt;BR /&gt;The first LS1046A fm1-mac3 ethernet interface will serve as a master to the second LS1046A with PTP default profile.&lt;BR /&gt;The PTP default profile slave capability has been already enabled in the first LS1046A. Now we need to create a second instance of ptp4l as a master in first LS1046A with PTP default profile.&lt;BR /&gt;Could someone kindly assist us or provide us the PTP default master profile configuration?&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Jibin&lt;/P&gt;</description>
      <pubDate>Wed, 30 Nov 2022 10:51:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/PTP-default-master-profile-configuration/m-p/1561965#M16019</guid>
      <dc:creator>jibin</dc:creator>
      <dc:date>2022-11-30T10:51:55Z</dc:date>
    </item>
    <item>
      <title>Re: PTP default master profile configuration</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/PTP-default-master-profile-configuration/m-p/1563935#M16046</link>
      <description>&lt;P&gt;&lt;SPAN&gt;The first LS1046A board works as a boundary clock, you can refer to LSDK document "Chapter 8.7.5.2: Boundary clock verification" for the details how to run a boundary clock. &lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 05 Dec 2022 01:57:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/PTP-default-master-profile-configuration/m-p/1563935#M16046</guid>
      <dc:creator>yipingwang</dc:creator>
      <dc:date>2022-12-05T01:57:53Z</dc:date>
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