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    <title>Other NXP ProductsのトピックRe: MC33771B TPL communication error with S32K</title>
    <link>https://community.nxp.com/t5/Other-NXP-Products/MC33771B-TPL-communication-error-with-S32K/m-p/1309691#M11571</link>
    <description>&lt;P&gt;Hi, thank you for your reply.&lt;/P&gt;&lt;P&gt;Me Resolved this issue by increasing priority of interrupt(SPI Slave/TPL).&lt;/P&gt;&lt;P&gt;Somehow losing synchronous read timing when there exist competitions with other ISRs(same priorities) especially in a burst read event (eg. 31 bytes raw value access)&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;See you&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Mon, 19 Jul 2021 08:10:30 GMT</pubDate>
    <dc:creator>sunghou-kim</dc:creator>
    <dc:date>2021-07-19T08:10:30Z</dc:date>
    <item>
      <title>MC33771B TPL communication error with S32K</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/MC33771B-TPL-communication-error-with-S32K/m-p/1305530#M11472</link>
      <description>&lt;P&gt;Hello, NXP!&lt;/P&gt;&lt;P&gt;I have some problems with TPL communication between MC33771B(2ea)&amp;nbsp; and MCU(S32K144) ( with MC33664).&lt;/P&gt;&lt;P&gt;my configuration of SPIs for interfacing MC33664's like below&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;Master SPI Tx: 2Mbps / 40bits/frame / PCS : active low / Second Edge / MBS / Interrupt type&lt;/P&gt;&lt;P&gt;Slave SPI Rx :&amp;nbsp;40bits/frame / PCS : active low / Second Edge / MBS / Interrupt type&lt;/P&gt;&lt;P&gt;Core Clock 80MHz&lt;/P&gt;&lt;P&gt;Initial Fault Status( no change afterwards )&lt;/P&gt;&lt;P&gt;CID1(1st daisy chain)&amp;nbsp;COM_STATUS error count 2 / FAULT1 0x0040 FAULT2 0x0000 FAULT3 0x0000&lt;/P&gt;&lt;P&gt;CID2(2nd daisy chain) COM_STATUS&amp;nbsp;error count 2 /&amp;nbsp;FAULT1 0x0040 FAULT2 0x0000 FAULT3 0x0000&lt;/P&gt;&lt;P&gt;----------------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;I am using NXP's BCC driver.&lt;/P&gt;&lt;P&gt;I'm trying to read/write registers about 20 times each, every 200ms.&lt;/P&gt;&lt;P&gt;But sporadically receive CRC(many)/TagID(few)/RC(few) mismatch errors. (average 1 error per 2 minutes )&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;At which point I should look into first to resolve this issue ?&lt;/P&gt;&lt;P&gt;Many thanks for your support in advance.&lt;/P&gt;&lt;P&gt;Sungho&lt;/P&gt;</description>
      <pubDate>Fri, 09 Jul 2021 15:36:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/MC33771B-TPL-communication-error-with-S32K/m-p/1305530#M11472</guid>
      <dc:creator>sunghou-kim</dc:creator>
      <dc:date>2021-07-09T15:36:11Z</dc:date>
    </item>
    <item>
      <title>Re: MC33771B TPL communication error with S32K</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/MC33771B-TPL-communication-error-with-S32K/m-p/1307777#M11516</link>
      <description>&lt;P&gt;Hello Sungho,&lt;/P&gt;&lt;P&gt;the first think I would look at is the physical interface - e.g. SPI lines, TPL lines, contacts etc. Also it would be helpful to monitor SPI/TPL lines with logic analyzer. If everything is correct, then the code you are using should be checked.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Jakub&lt;/P&gt;</description>
      <pubDate>Wed, 14 Jul 2021 15:23:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/MC33771B-TPL-communication-error-with-S32K/m-p/1307777#M11516</guid>
      <dc:creator>Jakub_R</dc:creator>
      <dc:date>2021-07-14T15:23:22Z</dc:date>
    </item>
    <item>
      <title>Re: MC33771B TPL communication error with S32K</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/MC33771B-TPL-communication-error-with-S32K/m-p/1309691#M11571</link>
      <description>&lt;P&gt;Hi, thank you for your reply.&lt;/P&gt;&lt;P&gt;Me Resolved this issue by increasing priority of interrupt(SPI Slave/TPL).&lt;/P&gt;&lt;P&gt;Somehow losing synchronous read timing when there exist competitions with other ISRs(same priorities) especially in a burst read event (eg. 31 bytes raw value access)&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;See you&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 19 Jul 2021 08:10:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/MC33771B-TPL-communication-error-with-S32K/m-p/1309691#M11571</guid>
      <dc:creator>sunghou-kim</dc:creator>
      <dc:date>2021-07-19T08:10:30Z</dc:date>
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