Other NXP ProductsのトピックRe: MIMXRT1064 I2C Does not Read

MIMXRT1064 I2C Does not Read

BryanWilcutt — Thu, 27 May 2021 21:24:43 GMT

I'm using MCUXpresso with an MIMXRT1064 processor. I am able to write data to my I2C device just fine, I can even read (according to sniffing the I2C bus) but the data is not removed from the stream and placed in my buffer.

The calls are:

uint8_t val = 0;

val = 0xee;

BOARD_LPI2C_Send(base, SSM4567_ADDR, SSM4567_REG_DAC_VOLUME, 1, (uint8_t *) &val, sizeof(val));

val = 0;

BOARD_LPI2C_Receive(base, SSM4567_ADDR, SSM4567_REG_DAC_VOLUME, 1, (uint8_t *) &val, sizeof(val));

Setting the device's volume to 0xee works just fine, reading it back works fine too as the 0xee data is returned in the I2C stream. However, the LPI2C driver doesn't move that data to my buffer.

Am I missing something?

Re: MIMXRT1064 I2C Does not Read

jeremyzhou — Fri, 28 May 2021 03:18:54 GMT

Hi,
Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
To provide the fastest possible support, I'd highly recommend you refer to the lpi2c demos in the SDK library.
Have a great day,
TIC

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Re: MIMXRT1064 I2C Does not Read

BryanWilcutt — Fri, 28 May 2021 13:48:19 GMT

Update:

Okay, I am able to read my data from the LPI2C bus, however it is ONE byte behind.

In other words:

Write 5 - > Read garbage

Write 6 - > Read 5

Write 7 - > Read 6

Should be:

Write 5 - > Read 5

Write 6 - > Read 6

Write 7 - > Read 7

Is the hardware buffering the LPI2C and sending me back the PREVIOUS packet?

Re: MIMXRT1064 I2C Does not Read

BryanWilcutt — Fri, 28 May 2021 14:07:25 GMT

Thank you for your reply!

Re: MIMXRT1064 I2C Does not Read

BryanWilcutt — Fri, 28 May 2021 13:56:01 GMT

Jeremy,

Does the read buffer to LPI2C have to be in non-cacheable memory? Is that the issue?

Re: MIMXRT1064 I2C Does not Read

jeremyzhou — Mon, 31 May 2021 02:30:02 GMT

Hi,
Thanks for your reply.
1) Does the read buffer to LPI2C have to be in non-cacheable memory? Is that the issue?
-- No, however, I'd like to recommend you store the read data in non-cacheable memory to avoid the cache data coherency problem.
Further, I'd like to suggest you use a logic analyzer to observe the I2C data stream and compare it to the slave device's datasheet, I think it can give you an insight into the phenomenon.
Have a great day,
TIC

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