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    <title>topic Re: SC16IS750 problem to verify TX/RX functionality in Other NXP Products</title>
    <link>https://community.nxp.com/t5/Other-NXP-Products/SC16IS750-problem-to-verify-TX-RX-functionality/m-p/1222304#M10360</link>
    <description>&lt;P&gt;Here I attached the SPI reference code,hope this could help you!&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Thu, 28 Jan 2021 02:07:17 GMT</pubDate>
    <dc:creator>guoweisun</dc:creator>
    <dc:date>2021-01-28T02:07:17Z</dc:date>
    <item>
      <title>SC16IS750 problem to verify TX/RX functionality</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/SC16IS750-problem-to-verify-TX-RX-functionality/m-p/1218405#M10306</link>
      <description>&lt;P&gt;Hi&lt;/P&gt;&lt;P&gt;I have a simple project with this IC.&lt;/P&gt;&lt;P&gt;I just configured the product to work as I2C - UART.&lt;/P&gt;&lt;P&gt;But when I write in the THR register, I expect the TXLVL register needs to show some number related to number of spaces available. But this register is always with the same number.&lt;/P&gt;&lt;P&gt;I am using a Raspberry to send the I2C commands, and I read all related documentation and follow the order of the commands this forum suggests but I am not having success.&lt;/P&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;"""&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;self.bus.write_byte_data(self.DEVICE_ADDRESS, LCR, 0x80)&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;# Set DLL&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;self&lt;/SPAN&gt;&lt;SPAN&gt;.bus.write_byte_data(&lt;/SPAN&gt;&lt;SPAN&gt;self&lt;/SPAN&gt;&lt;SPAN&gt;.DEVICE_ADDRESS, DLL, &lt;/SPAN&gt;&lt;SPAN&gt;0x&lt;/SPAN&gt;&lt;SPAN&gt;78&lt;/SPAN&gt;&lt;SPAN&gt;)&lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;SPAN&gt;# Set DLH&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;self&lt;/SPAN&gt;&lt;SPAN&gt;.bus.write_byte_data(&lt;/SPAN&gt;&lt;SPAN&gt;self&lt;/SPAN&gt;&lt;SPAN&gt;.DEVICE_ADDRESS, DLM, &lt;/SPAN&gt;&lt;SPAN&gt;0x&lt;/SPAN&gt;&lt;SPAN&gt;00&lt;/SPAN&gt;&lt;SPAN&gt;)&lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;SPAN&gt;print&lt;/SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;SPAN&gt;"Set 0xBF"&lt;/SPAN&gt;&lt;SPAN&gt;)&lt;/SPAN&gt;&lt;DIV&gt;&lt;SPAN&gt;self&lt;/SPAN&gt;&lt;SPAN&gt;.bus.write_byte_data(&lt;/SPAN&gt;&lt;SPAN&gt;self&lt;/SPAN&gt;&lt;SPAN&gt;.DEVICE_ADDRESS, LCR, &lt;/SPAN&gt;&lt;SPAN&gt;0x&lt;/SPAN&gt;&lt;SPAN&gt;BF&lt;/SPAN&gt;&lt;SPAN&gt;)&lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;SPAN&gt;# EFR only can be accessed with LCR = 0xBF&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;# EFR[4] --&amp;gt; enable enhanced functions &lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;self&lt;/SPAN&gt;&lt;SPAN&gt;.bus.write_byte_data(&lt;/SPAN&gt;&lt;SPAN&gt;self&lt;/SPAN&gt;&lt;SPAN&gt;.DEVICE_ADDRESS, EFR, &lt;/SPAN&gt;&lt;SPAN&gt;0x&lt;/SPAN&gt;&lt;SPAN&gt;10&lt;/SPAN&gt;&lt;SPAN&gt;)&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;# 8 data bit, 1 stop bit, no parity&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;self&lt;/SPAN&gt;&lt;SPAN&gt;.bus.write_byte_data(&lt;/SPAN&gt;&lt;SPAN&gt;self&lt;/SPAN&gt;&lt;SPAN&gt;.DEVICE_ADDRESS, LCR, &lt;/SPAN&gt;&lt;SPAN&gt;0x&lt;/SPAN&gt;&lt;SPAN&gt;03&lt;/SPAN&gt;&lt;SPAN&gt;)&lt;/SPAN&gt;&lt;/DIV&gt;&lt;BR /&gt;&lt;DIV&gt;&lt;SPAN&gt;# FCR: 0 0 1 0 0 1 1 1&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;self&lt;/SPAN&gt;&lt;SPAN&gt;.bus.write_byte_data(&lt;/SPAN&gt;&lt;SPAN&gt;self&lt;/SPAN&gt;&lt;SPAN&gt;.DEVICE_ADDRESS, FCR, &lt;/SPAN&gt;&lt;SPAN&gt;0x&lt;/SPAN&gt;&lt;SPAN&gt;27&lt;/SPAN&gt;&lt;SPAN&gt;)&lt;/SPAN&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;P&gt;"""&lt;/P&gt;&lt;P&gt;Log of execution:&lt;/P&gt;&lt;P&gt;Line Status LSR (hex): 0x60&lt;BR /&gt;Modem status MSR (hex): 0x0&lt;BR /&gt;TXLVL (hex): 0x40&lt;BR /&gt;RXLVL (hex): 0x0&lt;/P&gt;&lt;P&gt;Writing DATA to THR: 0xfa&lt;BR /&gt;Reading DATA (hex) from RHR:&amp;nbsp; 0x19&lt;BR /&gt;Line Status LSR (hex): 0x60&lt;BR /&gt;Modem status MSR (hex): 0x0&lt;BR /&gt;TXLVL (hex): 0x40&lt;BR /&gt;RXLVL (hex): 0x0&lt;/P&gt;&lt;P&gt;Writing DATA to THR: 0xfb&lt;BR /&gt;Reading DATA (hex) from RHR:&amp;nbsp; 0x19&lt;BR /&gt;Line Status LSR (hex): 0x60&lt;BR /&gt;Modem status MSR (hex): 0x0&lt;BR /&gt;TXLVL (hex): 0x40&lt;BR /&gt;RXLVL (hex): 0x0&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;As you see, there is no changes in the Status or Tx/Rrx registers.&lt;/P&gt;&lt;P&gt;Do you have some idea of how to debug this?&lt;/P&gt;&lt;P&gt;I saw TX pin is always high. But the configuration is OK.&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 21 Jan 2021 02:14:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/SC16IS750-problem-to-verify-TX-RX-functionality/m-p/1218405#M10306</guid>
      <dc:creator>jedward1977</dc:creator>
      <dc:date>2021-01-21T02:14:24Z</dc:date>
    </item>
    <item>
      <title>Re: SC16IS750 problem to verify TX/RX functionality</title>
      <link>https://community.nxp.com/t5/Other-NXP-Products/SC16IS750-problem-to-verify-TX-RX-functionality/m-p/1222304#M10360</link>
      <description>&lt;P&gt;Here I attached the SPI reference code,hope this could help you!&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 28 Jan 2021 02:07:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/Other-NXP-Products/SC16IS750-problem-to-verify-TX-RX-functionality/m-p/1222304#M10360</guid>
      <dc:creator>guoweisun</dc:creator>
      <dc:date>2021-01-28T02:07:17Z</dc:date>
    </item>
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