NXP DesignsのトピックRe: SJA1105Q https://community.nxp.com/t5/NXP-Designs/SJA1105Q/m-p/1075339#M565 <HTML><HEAD></HEAD><BODY><P>I think it will be functional. However we typically recommend that clock signals were designed in point-to-point topology. This is done in your scheme for all PHYs, however not for switches. I believe a clock distribution device would be also helpful there.</P><P></P><P>Regards,</P><P>Bulat</P></BODY></HTML> Thu, 09 Apr 2020 13:28:44 GMT Bulat 2020-04-09T13:28:44Z SJA1105Q https://community.nxp.com/t5/NXP-Designs/SJA1105Q/m-p/1075338#M564 <HTML><HEAD></HEAD><BODY><P><SPAN style="color: #333333; background-color: #f5f5f5;">we are currently designing the SJA1105QEL Scheme, please help us to see if the attached scheme is feasible, thank you</SPAN></P></BODY></HTML> Wed, 08 Apr 2020 08:49:30 GMT https://community.nxp.com/t5/NXP-Designs/SJA1105Q/m-p/1075338#M564 liuhuan 2020-04-08T08:49:30Z Re: SJA1105Q https://community.nxp.com/t5/NXP-Designs/SJA1105Q/m-p/1075339#M565 <HTML><HEAD></HEAD><BODY><P>I think it will be functional. However we typically recommend that clock signals were designed in point-to-point topology. This is done in your scheme for all PHYs, however not for switches. I believe a clock distribution device would be also helpful there.</P><P></P><P>Regards,</P><P>Bulat</P></BODY></HTML> Thu, 09 Apr 2020 13:28:44 GMT https://community.nxp.com/t5/NXP-Designs/SJA1105Q/m-p/1075339#M565 Bulat 2020-04-09T13:28:44Z Re: SJA1105Q https://community.nxp.com/t5/NXP-Designs/SJA1105Q/m-p/1075340#M566 <HTML><HEAD></HEAD><BODY><P><SPAN>Hello, I have the following problem with my SOC docking with SJA1105Q:&nbsp;</SPAN><BR /><SPAN>1, the SPI of the SOC supports up to 24.75 Mhz, can I configure the SJA1105Q with frequencies below 25 Mhz?</SPAN><BR /><SPAN>2,SOC only supports 16 bit SPI mode, how to configure with Sja1105q?</SPAN></P></BODY></HTML> Fri, 29 May 2020 14:06:18 GMT https://community.nxp.com/t5/NXP-Designs/SJA1105Q/m-p/1075340#M566 liuhuan 2020-05-29T14:06:18Z