topic PN7462 RST_N impact on PVDD_OUT in NFC

PN7462 RST_N impact on PVDD_OUT

vijo — Wed, 26 Jun 2019 06:39:14 GMT

Hi,

when RST_N input is active (low) the PVDD_OUT does not reach 3.3V

Pls see attached observations with scope dumps.

What is preventing the PVDD_OUT startup when RST_N is active ?

Why is the RST_N input pin not listed in the PN7462 family datasheet rev. 4.3, 24 January 2019, chap 8.16.1 table 25 ?

Best Regards

Viggo

Re: PN7462 RST_N impact on PVDD_OUT

stephanie_m — Mon, 01 Jul 2019 20:55:56 GMT

Hello,

You can check the chapter 8.1 of this document, I believe you will find useful information.

Regards,

Estephania

Re: PN7462 RST_N impact on PVDD_OUT

vijo — Tue, 02 Jul 2019 07:29:03 GMT

thank you,

but why is PVDD_OUT does not reaching 3.3V when the RST_N pin is low ?

Re: PN7462 RST_N impact on PVDD_OUT

stephanie_m — Wed, 03 Jul 2019 15:39:53 GMT

Hello,

Please consider that there are some configurations that might be affected during a reset, also, you will need to make sure that there must not be any load current drawn from PVDD_LDO during the soft start of the PVDD_LDO and consider that the PVDD_OUT it's an output of PVDD_LDO for pad voltage supply as it is mentioned in the data sheet of the device.

Hope that helps.

Regards,

Estephania

Re: PN7462 RST_N impact on PVDD_OUT

vijo — Fri, 05 Jul 2019 08:01:29 GMT

Thank you.

In stead of a reset IC I used a pull-up to VBUS like on the evaluation board.

And it works well.

Re: PN7462 RST_N impact on PVDD_OUT

stephanie_m — Fri, 05 Jul 2019 20:36:38 GMT

Hello,

So it is solved now?

Regards,

Estephania

Re: PN7462 RST_N impact on PVDD_OUT

vijo — Mon, 08 Jul 2019 08:08:34 GMT

yes, it is solved.

regards

Viggo

Re: PN7462 RST_N impact on PVDD_OUT

stephanie_m — Mon, 08 Jul 2019 14:15:43 GMT

It it good that it works now.

Regards,
Estephania