NFCのトピックSLRC610 System Margin Testing

SLRC610 System Margin Testing

johnbatikian — Thu, 21 Mar 2019 18:01:05 GMT

Hello,

I am using the slrc610 to read a custom RFID tag in ISO/IEC 15693. The system is in a confined space with a reader antenna that is 5mm x 5mm and the tag is roughly the same size. The working distance is less than 1mm and the mechanical design is build such that the working distance is always the same. I want to find a way to measure the margin of the system performance and one though was to decrease the transmission power level until the tag was no longer readable. I have tried reducing the TxAmp register set_cw_amplitude (found in “SLRC610 High-performance ICODE frontend SLRC610 and SLRC610 plus – 227643” section 8.8.2), but it did not cause enough variation to be noticeable.

Is there any other way to reduce the transmitter voltage until reading is no longer possible? Or another method for measuring margin of the system?

Re: SLRC610 System Margin Testing

Jonathan_Iglesias — Fri, 05 Apr 2019 16:02:58 GMT

Dear John Batikian,

playing with the distance of the reader can be done in two ways, either the reader have a DPC (dynamic power control) module or do it by hardware with your antenna design, as in the description the TxAmp helps to the accuracy of the modulation but to improve or modify the distance. we have readers with DPC like PN7462 or PN5180.

Jonathan

Re: SLRC610 System Margin Testing

juergenschoeder — Wed, 17 Apr 2019 10:44:51 GMT

Another option is to adjust/reduce the transmitter voltage supplied on TVDD, e.g. with a lab power supply. This will allow to modify the TX supply voltage and by this the antenna current at a given antenna matching impedance until the tag cannot be read anymore at your target distance. Once you have found the minimum current required to read your tag, you can adapt your antenna impedance in such a way that this TX current is achieved at your given supply voltage.