NFCのトピックRe: Anticollision algorithm in Mifare cards

Anticollision algorithm in Mifare cards

danielvicente — Mon, 04 Mar 2019 08:33:54 GMT

Hello guys,

I am working with PN5180 to do a reader for ISO14443A cards. Instead of using the library provided by NXP, I do my own implementation. If I put one card in the reader field, everything works fine, it reads the UUID, write and read information from a sector of MIFARE Classic Card. The problem is when two MIFARE cards are in the field.

I read the ISO14443 norm, and I found that if a colission occurs when a cascade tag is sent you have to send it again. In the second message it is necessary to identify how many bytes and bits the reader has received without collision.

For example: If I want to read two cards with UUIDs: (UID0)08 (UID1)FE (UID2)A2 (UID4)10 and (UID0)04 (UID1)FE (UID2)A2 (UID4)10. The collision occurs at the first byte in the third bit, thus I assume that the second message I have to send is: 0x93 (cascade tag) + 0x33 (NVB: 0x20 (Cascade tag + NVB) + 0x10 (aditional byte to send bits correctly received) + 0x03 (bits correctly received)) + 0x04 (bits correctly received)

I have tried to send in several ways, but I have not been able to select any card when two of them are in the field. I have attached the part of the norm where explains the anticollision protocol. Can anyone help me???

Thanks,

Re: Anticollision algorithm in Mifare cards

mario_castaneda — Mon, 04 Mar 2019 22:37:05 GMT

Hi Daniel,

We provide an example ISO10373 PCD, you can take this example as a reference for your implementation.

Please look at the AN10927 2. MIFARE products and ISO/IEC 14443 UIDs

This example has to be executed in the DUT which has an ISO 14443 based PCD implementation

For example, look at the phpalI14443p3a_Sw_ActivateCard()

NFC Reader Library - Software support for NFC Frontend solutions

Regards,

Mario

Re: Anticollision algorithm in Mifare cards

danielvicente — Thu, 07 Mar 2019 14:07:36 GMT

Thanks for the information Mario,

I was sending the correct information but I have forgotten to put correctly the RX_BIT_ALIGN field in CRC_RX_Config register.