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  <channel>
    <title>NFCのトピックRe: PN7462 I2CM Configuration and EEPROM Communication Example Request</title>
    <link>https://community.nxp.com/t5/NFC/PN7462-I2CM-Configuration-and-EEPROM-Communication-Example/m-p/2377419#M14283</link>
    <description>&lt;P&gt;Hello &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/200888"&gt;@EduardoZamora&lt;/a&gt;,&lt;/P&gt;&lt;P&gt;Thank you for your response.&lt;/P&gt;&lt;P&gt;I am using the following I2CM initialization and EEPROM read implementation, which works correctly in the PN7462AU_ex_phExHif demo project:&lt;/P&gt;&lt;PRE&gt;phStatus_t I2C_Init(void)
{
    phStatus_t status;
    uint8_t bBaudRate;

    bBaudRate = (uint8_t)
        ((PH_EXHIF_HW_CRYSTAL_CLK / 100000UL) -
         PH_EXHIF_HW_CRYSTAL_CLK_MHZ);

    status = phhalI2CM_Init(
                PH_EXHIF_HW_I2CM_TX_FIFO_THRES,
                PH_EXHIF_HW_I2CM_RX_FIFO_THRES,
                PH_EXHIF_HW_I2CM_TIMEOUT,
                PH_EXHIF_HW_I2CM_RETRY_CNT);

    if(status != PH_ERR_SUCCESS)
    {
        return status;
    }

    status = phhalI2CM_Config(
                0x40,
                0x09,
                E_I2CM_7BIT_ADDR_MODE);

    return status;
}

#define EEPROM_ADDR      (0x50U)

#define EEPROM_MFG_ADDR  (0xFAU)
#define EEPROM_DEV_ADDR  (0xFBU)
#define EEPROM_UID_ADDR  (0xFCU)

phStatus_t EEPROM_ReadUID(uint8_t uid[4])
{
    return EEPROM_Read(
                EEPROM_UID_ADDR,
                uid,
                4);
}

static phStatus_t EEPROM_Read(uint8_t memAddr,
                              uint8_t *pData,
                              uint16_t length)
{
    phStatus_t status;

    uint32_t txBuf[4];
    uint32_t rxBuf[64] = {0};

    txBuf[0] = memAddr;

    status = phhalI2CM_Transmit(
                EEPROM_ADDR,
                1,
                txBuf);

    if(status != PH_ERR_SUCCESS)
    {
        return status;
    }

    status = phhalI2CM_Receive(
                EEPROM_ADDR,
                length,
                rxBuf);

    if(status != PH_ERR_SUCCESS)
    {
        return status;
    }

    memcpy(pData, (uint8_t *)rxBuf, length);

    return PH_ERR_SUCCESS;
}&lt;/PRE&gt;&lt;P&gt;This exact code works in the PN7462AU_ex_phExHif demo. However, when integrated into my application and also phExMain example, it causes a HardFault.&lt;/P&gt;&lt;P&gt;Apart from commenting the GPIO evaluation/sync lines and changing the optimization level to -O0, is there any additional configuration required in phExMain and on my application for I2CM operation?&lt;/P&gt;&lt;P&gt;Regards,&lt;BR /&gt;Uday Gowda&lt;/P&gt;</description>
    <pubDate>Fri, 05 Jun 2026 09:34:47 GMT</pubDate>
    <dc:creator>uday_gowda</dc:creator>
    <dc:date>2026-06-05T09:34:47Z</dc:date>
    <item>
      <title>PN7462 I2CM Configuration and EEPROM Communication Example Request</title>
      <link>https://community.nxp.com/t5/NFC/PN7462-I2CM-Configuration-and-EEPROM-Communication-Example/m-p/2375843#M14277</link>
      <description>&lt;P&gt;Hi Team,&lt;/P&gt;&lt;P&gt;I am trying to use the PN7462 I2C Master (I2CM) interface to communicate with an external EEPROM (24AA025UID / AT25M02).&lt;/P&gt;&lt;P&gt;My I2CM initialization is as follows:&lt;/P&gt;&lt;PRE&gt;phStatus_t I2C_Init(void)
{
    phStatus_t status;
    uint8_t bBaudRate;

    bBaudRate = (uint8_t)
        ((PH_EXHIF_HW_CRYSTAL_CLK / 100000UL) -
         PH_EXHIF_HW_CRYSTAL_CLK_MHZ);

    status = phhalI2CM_Init(
                PH_EXHIF_HW_I2CM_TX_FIFO_THRES,
                PH_EXHIF_HW_I2CM_RX_FIFO_THRES,
                PH_EXHIF_HW_I2CM_TIMEOUT,
                PH_EXHIF_HW_I2CM_RETRY_CNT);

    if(status != PH_ERR_SUCCESS)
    {
        return status;
    }

    status = phhalI2CM_Config(
                243,
                0x09,
                E_I2CM_7BIT_ADDR_MODE);

    phHal_Nvic_EnableInterrupt(PH_HAL_NVIC_I2C_MASK);

    return status;
}&lt;/PRE&gt;&lt;P&gt;I am using phhalI2CM_SlaveCheck(), phhalI2CM_Transmit(), and phhalI2CM_Receive() to access the EEPROM.&lt;/P&gt;&lt;P&gt;Could you please provide:&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;&lt;P&gt;I have initialized I2CM using phhalI2CM_Init() and phhalI2CM_Config(), and enabled the I2C interrupt. However, when I call phhalI2CM_SlaveCheck(), I get a HardFault.&lt;/P&gt;&lt;P&gt;Could you please share:&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;Any I2CM EEPROM read/write example project for PN7462.&lt;/LI&gt;&lt;LI&gt;The recommended I2CM initialization sequence.&lt;/LI&gt;&lt;LI&gt;Any required PCR/PAD configuration.&lt;/LI&gt;&lt;LI&gt;Any OSAL/Event initialization required before using phhalI2CM_SlaveCheck(), phhalI2CM_Transmit(), and phhalI2CM_Receive().&lt;/LI&gt;&lt;/UL&gt;&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;Currently, transmit and slavecheck results in a HardFault, so I would like to verify that the I2CM initialization and usage sequence is correct.&lt;/P&gt;&lt;P&gt;Thanks,&lt;BR /&gt;Uday&lt;/P&gt;</description>
      <pubDate>Wed, 03 Jun 2026 13:46:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/NFC/PN7462-I2CM-Configuration-and-EEPROM-Communication-Example/m-p/2375843#M14277</guid>
      <dc:creator>uday_gowda</dc:creator>
      <dc:date>2026-06-03T13:46:31Z</dc:date>
    </item>
    <item>
      <title>Re: PN7462 I2CM Configuration and EEPROM Communication Example Request</title>
      <link>https://community.nxp.com/t5/NFC/PN7462-I2CM-Configuration-and-EEPROM-Communication-Example/m-p/2376132#M14279</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/261175"&gt;@uday_gowda&lt;/a&gt;&lt;/P&gt;
&lt;P&gt;Unfortunately, there is no specific demo for I2C EEPROM read/write. I will recommend you referring to PN7462AU_ex_phExHif demo (from latest &lt;A href="https://www.nxp.com/applications/technologies/security/industrial-security/nfc-reader-library-software-support-for-nfc-frontend-solutions:NFC-READER-LIBRARY" target="_blank"&gt;NFC Reader Library&lt;/A&gt; for PN7462) for I2CM initialization and operation.&lt;/P&gt;
&lt;P&gt;For I2CM Tx tests, please comment the lines used for GPIO evaluation or sync:&lt;/P&gt;
&lt;P&gt;- src/phExHif.c -&amp;gt; around lines 76, 84, 94, 108 (this line is used for reception)&lt;/P&gt;
&lt;P&gt;- src/phExHif_Hw.c -&amp;gt; around lines 120, 126, 142 (hardcode bHifInterface), 210 (hardcode bCommChannel to 1)&lt;BR /&gt;&lt;BR /&gt;Also, please consider changing Optimization level to None (-O0).&lt;/P&gt;
&lt;P&gt;Regards,&lt;BR /&gt;Eduardo.&lt;/P&gt;</description>
      <pubDate>Wed, 03 Jun 2026 21:06:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/NFC/PN7462-I2CM-Configuration-and-EEPROM-Communication-Example/m-p/2376132#M14279</guid>
      <dc:creator>EduardoZamora</dc:creator>
      <dc:date>2026-06-03T21:06:30Z</dc:date>
    </item>
    <item>
      <title>Re: PN7462 I2CM Configuration and EEPROM Communication Example Request</title>
      <link>https://community.nxp.com/t5/NFC/PN7462-I2CM-Configuration-and-EEPROM-Communication-Example/m-p/2377419#M14283</link>
      <description>&lt;P&gt;Hello &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/200888"&gt;@EduardoZamora&lt;/a&gt;,&lt;/P&gt;&lt;P&gt;Thank you for your response.&lt;/P&gt;&lt;P&gt;I am using the following I2CM initialization and EEPROM read implementation, which works correctly in the PN7462AU_ex_phExHif demo project:&lt;/P&gt;&lt;PRE&gt;phStatus_t I2C_Init(void)
{
    phStatus_t status;
    uint8_t bBaudRate;

    bBaudRate = (uint8_t)
        ((PH_EXHIF_HW_CRYSTAL_CLK / 100000UL) -
         PH_EXHIF_HW_CRYSTAL_CLK_MHZ);

    status = phhalI2CM_Init(
                PH_EXHIF_HW_I2CM_TX_FIFO_THRES,
                PH_EXHIF_HW_I2CM_RX_FIFO_THRES,
                PH_EXHIF_HW_I2CM_TIMEOUT,
                PH_EXHIF_HW_I2CM_RETRY_CNT);

    if(status != PH_ERR_SUCCESS)
    {
        return status;
    }

    status = phhalI2CM_Config(
                0x40,
                0x09,
                E_I2CM_7BIT_ADDR_MODE);

    return status;
}

#define EEPROM_ADDR      (0x50U)

#define EEPROM_MFG_ADDR  (0xFAU)
#define EEPROM_DEV_ADDR  (0xFBU)
#define EEPROM_UID_ADDR  (0xFCU)

phStatus_t EEPROM_ReadUID(uint8_t uid[4])
{
    return EEPROM_Read(
                EEPROM_UID_ADDR,
                uid,
                4);
}

static phStatus_t EEPROM_Read(uint8_t memAddr,
                              uint8_t *pData,
                              uint16_t length)
{
    phStatus_t status;

    uint32_t txBuf[4];
    uint32_t rxBuf[64] = {0};

    txBuf[0] = memAddr;

    status = phhalI2CM_Transmit(
                EEPROM_ADDR,
                1,
                txBuf);

    if(status != PH_ERR_SUCCESS)
    {
        return status;
    }

    status = phhalI2CM_Receive(
                EEPROM_ADDR,
                length,
                rxBuf);

    if(status != PH_ERR_SUCCESS)
    {
        return status;
    }

    memcpy(pData, (uint8_t *)rxBuf, length);

    return PH_ERR_SUCCESS;
}&lt;/PRE&gt;&lt;P&gt;This exact code works in the PN7462AU_ex_phExHif demo. However, when integrated into my application and also phExMain example, it causes a HardFault.&lt;/P&gt;&lt;P&gt;Apart from commenting the GPIO evaluation/sync lines and changing the optimization level to -O0, is there any additional configuration required in phExMain and on my application for I2CM operation?&lt;/P&gt;&lt;P&gt;Regards,&lt;BR /&gt;Uday Gowda&lt;/P&gt;</description>
      <pubDate>Fri, 05 Jun 2026 09:34:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/NFC/PN7462-I2CM-Configuration-and-EEPROM-Communication-Example/m-p/2377419#M14283</guid>
      <dc:creator>uday_gowda</dc:creator>
      <dc:date>2026-06-05T09:34:47Z</dc:date>
    </item>
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