topic Re: PN5190B1 pin layout setup in NFC

PN5190B1 pin layout setup

ignacioS — Thu, 12 Feb 2026 11:14:18 GMT

Hi,

Im creating the schematic and layout for the PN5190B1 and due my ultra low power consuption request i will nor TXLDO not DC-DC.

So, i assume that i need to go for configuration example 3 on chapter 9.5.3.6 of the datasheet.

My doubt is what to do with following pins: BOOST_LX, VDDBOOTS, VUP ,VSS PWR and VDDPA. I would say that i need to left some open and not connected to anything but i can not find a clear advise on that and on the datasheet figure it looks that they are connected....

Could you help me?

thanks in advanced,

ignacio

Re: PN5190B1 pin layout setup

EduardoZamora — Thu, 12 Feb 2026 21:53:42 GMT

Hello @ignacioS

Hope you are doing well.

As I understand, you are considering a design that uses neither TXLDO nor DC-DC, is this correct? Configuration example 3 shown in PN5190 Data Sheet does use TXLDO, while not using DC-DC converter. The VBAT = VUP drives the TXLDO, which provides the VDDPA.

According to your requirements, please consider using configuration example 5 as reference for the required connections:

Regards,
Eduardo.

Re: PN5190B1 pin layout setup

ignacioS — Fri, 13 Feb 2026 12:25:07 GMT

Hi Eduardo,

Thank you for your quick reply.

Before moving forward, I think I first need to better understand the available options. My device will operate in ultra-low-power mode using polling. That’s why I have already read that I should not use the DC/DC.

However, regarding the LDO: in principle, to avoid additional consumption I am not planning to use it, and I intend to power everything directly from the 3.3 V rail of the supply. This leads to my first question: is “not using the LDO” the same as “not connecting it”? If both options are possible, do they consume the same? I assume that leaving it unconnected would be more efficient.

My second question is about the DCDC and LDO pins. In the figures in the datasheet I see BOOST_LX, VDDBOOST,VUP,... connected to VBATPWR. This is what I don’t understand. If I am not using the boost converter, do I simply skip the inductor and direct connect that line to VBATPWR? I’m not sure what I should do with these pins if I am not using them.

Thank you very much for your help.

Best regards,

Re: PN5190B1 pin layout setup

EduardoZamora — Fri, 13 Feb 2026 21:07:16 GMT

Hi,

For ULPCD usage, either "TX_LDO transmitter supply" or "Direct transmitter supply" connections are recommended. According to PN5190 design-in recommendations, Section 2.1.4, not using the TXLDO (DPC becomes obsolete) should save a few mV at the TX driver supply.

If you are not using the TXLDO, you should consider a Direct transmitter supply configuration, where TXLDO is configured OFF and VUP_TX and VDDPA are connected to VBAT/VBATPWR.

Boost inductor is only required for DC-DC operation. According to your requirements, please refer to configuration example 5, which requires the following connections:

Regards,
Eduardo.

Re: PN5190B1 pin layout setup

ignacioS — Mon, 16 Feb 2026 09:20:45 GMT

Hi Eduardo,

Thank you! Now that I’ve re-read everything again, I’m no longer sure I’m thinking about this correctly.

My device has to stay in ULPCD mode all the time, and when it detects a card or a mobile phone it will wake up. I initially understood that, to achieve the lowest possible consumption, I should operate without the DC/DC boost and without the LDO. However, I’m now thinking my interpretation may be incorrect, and that what I actually need to do is simply disable them when entering ULPCD, but when the device is active and communicating it may be useful to have them enabled.

Is that correct?

Thanks again!

Re: PN5190B1 pin layout setup

EduardoZamora — Mon, 16 Feb 2026 20:28:19 GMT

Hi,

For low-power reader devices, the use of DC-DC does not make sense; ULPCD cannot be used together with the DC-DC function. Also, specific hardware configurations ("TX_LDO transmitter supply" or "Direct transmitter supply") that would make DC-DC not available are required.

When DC-DC converter is not used, there some settings that must be considered for TXLDO. Please, refer to PN5190 questions and answers, Chapter 9.

Regards,
Eduardo.

Re: PN5190B1 pin layout setup

ignacioS — Tue, 17 Feb 2026 12:06:02 GMT

Hi Eduardo,

Thanks for your message. In your opinion, given your experience with NXP, is it worth enabling the TXLDO or not?

My understanding (please correct me if I’m wrong) is that while the device is in ULPCD/ULP mode I should keep TXLDO disabled, but when it wakes up and needs to communicate I can enable TXLDO to supply the TX path.

In my design, the NXP module/IC is powered only from a single 3.3 V rail coming from another board (battery + regulator). The environment will be challenging, with metal around and partially in front of the device, so any improvement in RF performance would be very helpful.

I assume that keeping TXLDO disabled in ULPCD does not add any extra current consumption, correct? During communication I could accept some losses/overhead, since it will only transmit a few times per day.

What do you think?

On the other hand, going back to the DC/DC: it surprises me that if I don’t want to use it, I still have to connect it directly to VBATPWR, but in any case that’s what I will do. I will follow configuration 3 from the datasheet.

Once I have the schematic ready, I’d like to paste it here so you can take a look and tell me if you see anything unusual.

Thanks for your support

Re: PN5190B1 pin layout setup

EduardoZamora — Tue, 17 Feb 2026 20:53:06 GMT

Hi,

Operation without DC-DC converter, but with TXLDO, is a typical use case. TXLDO does not exclude the use of ULPCD. Configuration example 3 should be OK for this purpose.

Although ULPCD (together with a proper antenna design for PN5190) could achieve up to ~4cm, a metal environment will be a challenge since sensitivity is reduced in this mode.

Regards,
Eduardo.

Re: PN5190B1 pin layout setup

ignacioS — Thu, 19 Feb 2026 00:19:12 GMT

Thanks Eduardo, lets just help me to check some details and i think we are done here.

My question is about the pins BOOST_LX, VDDBOOST and VSS_PWR. In the configuration example 3 , the first two are connected to the input supply, and VSS_PWR is connected to GND. This is my biggest doubt: 1.- is this correct?, or should these three pins be left unconnected (floating) if the DCDC boost is not used? I see what the datasheet shows but , not sure, i really have doubts that this is like that and i would apreciate a clear confirmation.

This is my current schematic, in which I have added the three connections that are generating doubts for me. Apart from these, 2.- is the schematic correct for my product?

I would appreciate it if you could double-check it, as I am going to migrate the entire product range to this chip and I urgently need the prototypes to work correctly on the first run.

Assuming they must be connected, I also see in the diagram that they are connected before the input capacitor. 3.- Would a layout where I connect pins 1 and 2 to pin 39 under the chip (with a 0.2 mm trace) be acceptable?, or would it be better to route the connection outside the package? 4.- Is it important that it is before the capacitor, or does it not matter?

Many thanks for your help.

Best regards,

Re: PN5190B1 pin layout setup

EduardoZamora — Thu, 19 Feb 2026 18:16:44 GMT

Hi,

Taking a look at your schematics, I could not find VDDIO power supply; this voltage is required for the Host Interface and GPIOs. Also, pull-up resistor on VEN pin should be connected to VDDIO. Aside from that, all other power connections and capacitors should be OK.

For the layout, please refer to PN5190 antenna design guide, Section 3.4. These are the recommendations for VBATPWR, VDDBOOST, BOOST_LX:

1. Place components as close as possible to each other.

2. Route VBATPWR, BOOSTLX, VDDBOOST as short as possible.

3. Provide Cu shape. If shape is not possible, route with a wide trace (150mils).

4. No vias are allowed.

Regards,
Eduardo.

Re: PN5190B1 pin layout setup

ignacioS — Thu, 19 Feb 2026 23:04:47 GMT

Wow Eduardo, that was a very good catch on a major mistake on my side — thank you very much for that.

I’ve just adjusted everything and have now tied VDDIO to 3V3, and also fixed the VEN pull-up accordingly. With this, I think we can consider this topic closed , isnt' it?

To avoid mixing topics, I’ve opened another thread regarding the different models and their firmware versions.

Many thanks again for your help.