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    <title>NFCのトピックNTAG424DNA WRITE ENDURANCE</title>
    <link>https://community.nxp.com/t5/NFC/NTAG424DNA-WRITE-ENDURANCE/m-p/2132728#M13396</link>
    <description>&lt;P&gt;Hi&lt;/P&gt;&lt;P&gt;I'm asking about write action on certain NFC tags&lt;/P&gt;&lt;P&gt;Here's Google:&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;DIV class=""&gt;1. Updating a counter directly on the tag&lt;/DIV&gt;&lt;DIV class=""&gt;&amp;nbsp;&lt;/DIV&gt;&lt;UL&gt;&lt;LI&gt;&lt;SPAN class=""&gt;Many NFC chips, like the NTAG 213, 215, or 216, have a built-in counter that can be configured to increment every time the tag is scanned.&lt;/SPAN&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;&lt;SPAN class=""&gt;When a tag with this feature is scanned, the chip itself updates the counter value stored in its memory. This update process is a write action.&lt;/SPAN&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;&lt;SPAN class=""&gt;This counter can be incorporated into the NDEF message, for example, by adding it to the end of a URL so that each scan returns a unique link.&lt;/SPAN&gt;&lt;SPAN class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&lt;SPAN class=""&gt;&lt;SPAN class=""&gt;&lt;U&gt;&lt;STRONG&gt;Does this action (counting) gets counted against the "write cycle" limit of each chip?&lt;/STRONG&gt;&lt;/U&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;DIV class=""&gt;In terms of the NTAG 424 DNA's overall lifespan, a chip without an enabled read counter would technically last longer than one with a counter,&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;STRONG&gt;if all other factors are equal&lt;/STRONG&gt;.&lt;SPAN class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV class=""&gt;Here's why:&lt;/DIV&gt;&lt;UL&gt;&lt;LI&gt;&lt;SPAN class=""&gt;&lt;STRONG&gt;Write endurance:&lt;/STRONG&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;Every time the read counter is incremented, it's considered a write operation to the chip's memory.&lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN class=""&gt;&lt;STRONG&gt;Limited write cycles:&lt;/STRONG&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;All NFC chips, including the NTAG 424 DNA, have a finite number of write cycles they can endure before potentially failing. For the NTAG 424 DNA, it's rated at a minimum of 200,000 write cycles.&lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN class=""&gt;&lt;STRONG&gt;Reduced writes, prolonged life:&lt;/STRONG&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;If a chip does not have a counter, or the counter feature is disabled, there are no automatic write operations occurring each time the tag is read. This would essentially conserve the chip's write endurance, allowing it to function for longer, theoretically up to its maximum write cycle limit and beyond, depending on the frequency of other write operations.&lt;/SPAN&gt;&lt;SPAN class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;U&gt;&lt;STRONG&gt;Is this true, are there documentations on this?&amp;nbsp;&lt;/STRONG&gt;&lt;/U&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;EM&gt;&lt;STRONG&gt;We are building application of Ntag for mass audience to tap (marketing) and need to know when we need to replace the chips for our solutions.&lt;/STRONG&gt;&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;EM&gt;&lt;STRONG&gt;Thank you for any pointers.&lt;/STRONG&gt;&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Sat, 12 Jul 2025 00:07:09 GMT</pubDate>
    <dc:creator>tonytonytony</dc:creator>
    <dc:date>2025-07-12T00:07:09Z</dc:date>
    <item>
      <title>NTAG424DNA WRITE ENDURANCE</title>
      <link>https://community.nxp.com/t5/NFC/NTAG424DNA-WRITE-ENDURANCE/m-p/2132728#M13396</link>
      <description>&lt;P&gt;Hi&lt;/P&gt;&lt;P&gt;I'm asking about write action on certain NFC tags&lt;/P&gt;&lt;P&gt;Here's Google:&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;DIV class=""&gt;1. Updating a counter directly on the tag&lt;/DIV&gt;&lt;DIV class=""&gt;&amp;nbsp;&lt;/DIV&gt;&lt;UL&gt;&lt;LI&gt;&lt;SPAN class=""&gt;Many NFC chips, like the NTAG 213, 215, or 216, have a built-in counter that can be configured to increment every time the tag is scanned.&lt;/SPAN&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;&lt;SPAN class=""&gt;When a tag with this feature is scanned, the chip itself updates the counter value stored in its memory. This update process is a write action.&lt;/SPAN&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;&lt;SPAN class=""&gt;This counter can be incorporated into the NDEF message, for example, by adding it to the end of a URL so that each scan returns a unique link.&lt;/SPAN&gt;&lt;SPAN class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&lt;SPAN class=""&gt;&lt;SPAN class=""&gt;&lt;U&gt;&lt;STRONG&gt;Does this action (counting) gets counted against the "write cycle" limit of each chip?&lt;/STRONG&gt;&lt;/U&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;DIV class=""&gt;In terms of the NTAG 424 DNA's overall lifespan, a chip without an enabled read counter would technically last longer than one with a counter,&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;STRONG&gt;if all other factors are equal&lt;/STRONG&gt;.&lt;SPAN class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV class=""&gt;Here's why:&lt;/DIV&gt;&lt;UL&gt;&lt;LI&gt;&lt;SPAN class=""&gt;&lt;STRONG&gt;Write endurance:&lt;/STRONG&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;Every time the read counter is incremented, it's considered a write operation to the chip's memory.&lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN class=""&gt;&lt;STRONG&gt;Limited write cycles:&lt;/STRONG&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;All NFC chips, including the NTAG 424 DNA, have a finite number of write cycles they can endure before potentially failing. For the NTAG 424 DNA, it's rated at a minimum of 200,000 write cycles.&lt;/SPAN&gt;&lt;/LI&gt;&lt;LI&gt;&lt;SPAN class=""&gt;&lt;STRONG&gt;Reduced writes, prolonged life:&lt;/STRONG&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;If a chip does not have a counter, or the counter feature is disabled, there are no automatic write operations occurring each time the tag is read. This would essentially conserve the chip's write endurance, allowing it to function for longer, theoretically up to its maximum write cycle limit and beyond, depending on the frequency of other write operations.&lt;/SPAN&gt;&lt;SPAN class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;U&gt;&lt;STRONG&gt;Is this true, are there documentations on this?&amp;nbsp;&lt;/STRONG&gt;&lt;/U&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;EM&gt;&lt;STRONG&gt;We are building application of Ntag for mass audience to tap (marketing) and need to know when we need to replace the chips for our solutions.&lt;/STRONG&gt;&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;EM&gt;&lt;STRONG&gt;Thank you for any pointers.&lt;/STRONG&gt;&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Sat, 12 Jul 2025 00:07:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/NFC/NTAG424DNA-WRITE-ENDURANCE/m-p/2132728#M13396</guid>
      <dc:creator>tonytonytony</dc:creator>
      <dc:date>2025-07-12T00:07:09Z</dc:date>
    </item>
    <item>
      <title>Re: NTAG424DNA WRITE ENDURANCE</title>
      <link>https://community.nxp.com/t5/NFC/NTAG424DNA-WRITE-ENDURANCE/m-p/2135505#M13413</link>
      <description>&lt;P&gt;&lt;SPAN data-teams="true"&gt;NFC Counter has mechanism, which stores &amp;amp; reads value from physically different EEPROM memory locations. This way, max value of 3 Byte counter can be reached and will not wear-out EEPROM cell.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 17 Jul 2025 06:30:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/NFC/NTAG424DNA-WRITE-ENDURANCE/m-p/2135505#M13413</guid>
      <dc:creator>jimmychan</dc:creator>
      <dc:date>2025-07-17T06:30:21Z</dc:date>
    </item>
    <item>
      <title>Re: NTAG424DNA WRITE ENDURANCE</title>
      <link>https://community.nxp.com/t5/NFC/NTAG424DNA-WRITE-ENDURANCE/m-p/2135705#M13416</link>
      <description>So counter update on different location does not affect the tag's write cycle, thus the tag does not need to be replaced at 200,000 count. Is that correct?</description>
      <pubDate>Thu, 17 Jul 2025 10:15:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/NFC/NTAG424DNA-WRITE-ENDURANCE/m-p/2135705#M13416</guid>
      <dc:creator>tonytonytony</dc:creator>
      <dc:date>2025-07-17T10:15:43Z</dc:date>
    </item>
    <item>
      <title>Re: NTAG424DNA WRITE ENDURANCE</title>
      <link>https://community.nxp.com/t5/NFC/NTAG424DNA-WRITE-ENDURANCE/m-p/2136404#M13426</link>
      <description>&lt;P&gt;Correct.&lt;/P&gt;</description>
      <pubDate>Fri, 18 Jul 2025 08:31:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/NFC/NTAG424DNA-WRITE-ENDURANCE/m-p/2136404#M13426</guid>
      <dc:creator>jimmychan</dc:creator>
      <dc:date>2025-07-18T08:31:02Z</dc:date>
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