CLRC66303 with external power amplifier design

DYX — Thu, 03 Jul 2025 06:39:53 GMT

Hi NXP expert！

In order to achieve a longer read range (approximately 40 cm), I am designing an external power amplification circuit based on the CLRC66303 (targeting a power output of 4W). The attachment shows an external amplification circuit from Application Note AN1425 (designed for the PN5xx series). My question is:

1、Is this amplification circuit suitable for the CLRC66303? If I use the circuit shown in the diagram for RF amplification in CLRC66303, is there anything I should pay attention to?

2、I am concerned that the amplification circuit might affect the phase of the carrier. When the internal receiving circuit of the chip performs quadrature demodulation, the clocks generated by the I and Q orthogonal mixers could have a phase shift relative to the carrier that actually passes through the amplification circuit. This could impact the receiving performance. Do I need add some auxiliary circuitry in receive path, such as a phase-shifting circuit？

Re: CLRC66303 with external power amplifier design

DYX — Thu, 03 Jul 2025 06:42:50 GMT

Supplementary attachment is as follows.

Re: CLRC66303 with external power amplifier design

KaiLi — Fri, 04 Jul 2025 12:43:11 GMT

Hello @DYX

The maximum power of the CLRC66303 is approximately 2W. This design of the PN5xx has not been implemented on the CLRC66303, and it is uncertain whether it is still usable. So just say sorry that we have no available suggestions for you.

NFCのトピックCLRC66303 with external power amplifier design

CLRC66303 with external power amplifier design

Re: CLRC66303 with external power amplifier design

Re: CLRC66303 with external power amplifier design