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    <title>NFCのトピックRe: PN7160: Abnormal output TX waveform</title>
    <link>https://community.nxp.com/t5/NFC/PN7160-Abnormal-output-TX-waveform/m-p/1840327#M11533</link>
    <description>&lt;P&gt;Hi Daniel,&amp;nbsp;&lt;/P&gt;&lt;P&gt;I found the problem: my settings for PLL_SETTING and DPLL_SETTING were incorrect. I was entering them in big-endian order (e.g. for 32MHz, sending 0x82 first). After changing this to little-endian (e.g. for 32MHz, sending 0x88 first) I got the expected TX waveform out.&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Raghib&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Wed, 03 Apr 2024 20:04:03 GMT</pubDate>
    <dc:creator>raghib</dc:creator>
    <dc:date>2024-04-03T20:04:03Z</dc:date>
    <item>
      <title>PN7160: Abnormal output TX waveform</title>
      <link>https://community.nxp.com/t5/NFC/PN7160-Abnormal-output-TX-waveform/m-p/1836611#M11513</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I'm having trouble getting the PN7160 to produce a valid RF field when transmitting. I'm trying to set up the chip to work as a tag reader by sending NCI commands directly over I2C, as my system is baremetal. I am using an external 32MHz clock source, and I am also using an external 5.4V supply connected to VDD(UP), with no connection to DCDC_EN on the PN7160.&lt;/P&gt;&lt;P&gt;This is the sequence of commands I am sending, and their responses:&amp;nbsp;&lt;/P&gt;&lt;BLOCKQUOTE&gt;&lt;P&gt;&lt;STRONG&gt;CORE_RESET_CMD&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;W: [20, 00, 01, 01]&amp;nbsp;&amp;nbsp;&lt;/P&gt;&lt;P&gt;R:&amp;nbsp;[40, 00, 01, 00]&lt;/P&gt;&lt;P&gt;R: [60, 00, 09, 02, 01, 20, 04, 04, 61, 12, 50, 05]&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;CORE_INIT_CMD&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;W:&amp;nbsp;[20, 01, 00]&amp;nbsp;&lt;/P&gt;&lt;P&gt;R:&amp;nbsp;[40, 01, 1e, 00, 1a, 7e, 06, 02, 01, d0, 02, ff, ff, 01, ff, 00, 08, 00, 00, 01, 00, 02, 00, 03, 00, 80, 00, 82, 00, 83, 00, 84, 00]&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;CORE_SET_POWER_MODE_CMD&lt;/STRONG&gt; (disable standby)&lt;/P&gt;&lt;P&gt;W:&amp;nbsp;[2f, 00, 01, 00]&amp;nbsp;&lt;/P&gt;&lt;P&gt;R:&amp;nbsp;[4f, 00, 01, 00]&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;CORE_SET_CONFIG_CMD&lt;/STRONG&gt; (TOTAL_DURATION)&lt;/P&gt;&lt;P&gt;W:&amp;nbsp;[20, 02, 05, 01, 00, 02, fe, 01]&amp;nbsp;&lt;/P&gt;&lt;P&gt;R:&amp;nbsp;[40, 02, 02, 00, 00]&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;CORE_SET_CONFIG_CMD&lt;/STRONG&gt; (TAG_DETECTOR_CFG, CLOCK_SEL_CFG, PLL_SETTING, DPLL_SETTING, CLOCK_TO_CFG)&lt;/P&gt;&lt;P&gt;W:&amp;nbsp;[20, 02, 23, 05,&lt;/P&gt;&lt;P&gt;a0, 40, 01, 00,&lt;/P&gt;&lt;P&gt;a0, 03, 01, 00,&lt;/P&gt;&lt;P&gt;a0, 20, 08, 82, a3, 51, b8, 02, f0, f1, 88,&lt;/P&gt;&lt;P&gt;a0, 26, 08, 82, a3, 01, b0, 02, e2, 01, 88,&lt;/P&gt;&lt;P&gt;a0, 04, 01, 01]&amp;nbsp;&lt;/P&gt;&lt;P&gt;R:&amp;nbsp;[40, 02, 02, 00, 00]&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;CORE_SET_CONFIG_CMD&lt;/STRONG&gt; (PMU_CFG)&lt;/P&gt;&lt;P&gt;W: [20, 02, 0f, 01, a0, 0e, 0b, 11, 01, 02, 02, 00, 00, 1e, ff, 00, 10, 0c]&lt;/P&gt;&lt;P&gt;R:&amp;nbsp;[40, 02, 02, 00, 00]&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;CORE_RESET_CMD&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;W: [20, 00, 01, 01]&lt;/P&gt;&lt;P&gt;R:&amp;nbsp;[40, 00, 01, 00]&lt;/P&gt;&lt;P&gt;R: [60, 00, 09, 02, 01, 20, 04, 04, 61, 12, 50, 05]&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;CORE_INIT_CMD&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;W:&amp;nbsp; [20, 01, 00]&lt;/P&gt;&lt;P&gt;R:&amp;nbsp;[40, 01, 1e, 00, 1a, 7e, 06, 02, 01, d0, 02, ff, ff, 01, ff, 00, 08, 00, 00, 01, 00, 02, 00, 03, 00, 80, 00, 82, 00, 83, 00, 84, 00]&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;NCI_PROPRIETARY_ACT_CMD&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;W:&amp;nbsp;[2f, 02, 00]&lt;/P&gt;&lt;P&gt;R:&amp;nbsp;[4f, 02, 05, 00, 00, 01, aa, dd]&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;RF_DISCOVER_MAP_CMD&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;W:&amp;nbsp;[21, 00, 04, 01, 02, 01, 01]&lt;/P&gt;&lt;P&gt;R:&amp;nbsp;[41, 00, 01, 00]&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;CORE_SET_CONFIG_CMD&lt;/STRONG&gt; (PA_BAIL_OUT, RF_FIELD_INFO)&lt;/P&gt;&lt;P&gt;W:&amp;nbsp;[20, 02, 06, 02, 08, 00, 80, 01, 01]&lt;/P&gt;&lt;P&gt;R:&amp;nbsp;[40, 02, 02, 00, 00]&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;RF_DISCOVER_CMD&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;W: [21, 03, 03, 01, 00, 01]&lt;/P&gt;&lt;P&gt;R:&amp;nbsp;[41, 03, 01, 00]&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;CORE_GENERIC_ERROR_NTF&amp;nbsp;&lt;/STRONG&gt;(DISCOVERY_TARGET_ACTIVATION_FAILED)&lt;/P&gt;&lt;P&gt;R:&amp;nbsp;[60, 07, 01, a1]&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;That same CORE_GENERIC_ERROR_NTF is continuously sent after starting discovery, and the reader is unable to activate tags passed by the antenna. After troubleshooting the the clock hardware, we probed the TX path before the first inductor in the matching circuit to see if there was at least a carrier being generated. We found that there's a square waveform with a frequency between ~4-6 MHz.&lt;/P&gt;&lt;P&gt;This is one test, where we saw a 5.07MHz wave:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="6ed6450025d288f39e93dc050e63782_720.jpg" style="width: 668px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/270778i9A5697F00A8F320E/image-dimensions/668x501?v=v2" width="668" height="501" role="button" title="6ed6450025d288f39e93dc050e63782_720.jpg" alt="6ed6450025d288f39e93dc050e63782_720.jpg" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;This is another test, where we saw 4.42MHz:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="img_20240327_124104_720.jpg" style="width: 668px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/270779i46D9238B992D737D/image-dimensions/668x301?v=v2" width="668" height="301" role="button" title="img_20240327_124104_720.jpg" alt="img_20240327_124104_720.jpg" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;I'm sure there's something wrong in the settings I'm writing to the chip, but I can't seem to figure it out. Could someone please take a look at this and let me know if I'm missing something? Thank you.&lt;/P&gt;&lt;P&gt;Raghib&lt;/P&gt;</description>
      <pubDate>Wed, 27 Mar 2024 17:18:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/NFC/PN7160-Abnormal-output-TX-waveform/m-p/1836611#M11513</guid>
      <dc:creator>raghib</dc:creator>
      <dc:date>2024-03-27T17:18:38Z</dc:date>
    </item>
    <item>
      <title>Re: PN7160: Abnormal output TX waveform</title>
      <link>https://community.nxp.com/t5/NFC/PN7160-Abnormal-output-TX-waveform/m-p/1838929#M11528</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/231528"&gt;@raghib&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;CORE_GENERIC_ERROR_NTF "6007A1" interrupts the presence check procedure.&amp;nbsp; This is usually observed when noise is catch on RF.&amp;nbsp; To limit this, RX sensitivity must be adapted to the customer integration.&lt;/P&gt;
&lt;P&gt;For more details, please look into the PN7160 RF settings guide.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="danielchen_0-1712033589362.png" style="width: 664px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/271427iB326A1F5BFDA7518/image-dimensions/664x718?v=v2" width="664" height="718" role="button" title="danielchen_0-1712033589362.png" alt="danielchen_0-1712033589362.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;The RX gain must be adjusted for each technology&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="danielchen_1-1712033655624.png" style="width: 730px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/271428i0F1E177D26257057/image-dimensions/730x294?v=v2" width="730" height="294" role="button" title="danielchen_1-1712033655624.png" alt="danielchen_1-1712033655624.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards&lt;/P&gt;
&lt;P&gt;Daniel&lt;/P&gt;</description>
      <pubDate>Tue, 02 Apr 2024 04:54:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/NFC/PN7160-Abnormal-output-TX-waveform/m-p/1838929#M11528</guid>
      <dc:creator>danielchen</dc:creator>
      <dc:date>2024-04-02T04:54:47Z</dc:date>
    </item>
    <item>
      <title>Re: PN7160: Abnormal output TX waveform</title>
      <link>https://community.nxp.com/t5/NFC/PN7160-Abnormal-output-TX-waveform/m-p/1840327#M11533</link>
      <description>&lt;P&gt;Hi Daniel,&amp;nbsp;&lt;/P&gt;&lt;P&gt;I found the problem: my settings for PLL_SETTING and DPLL_SETTING were incorrect. I was entering them in big-endian order (e.g. for 32MHz, sending 0x82 first). After changing this to little-endian (e.g. for 32MHz, sending 0x88 first) I got the expected TX waveform out.&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Raghib&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 03 Apr 2024 20:04:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/NFC/PN7160-Abnormal-output-TX-waveform/m-p/1840327#M11533</guid>
      <dc:creator>raghib</dc:creator>
      <dc:date>2024-04-03T20:04:03Z</dc:date>
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