MPC5xxxのトピックRe: MPC5777C-Clock source to the PIT Timer

MPC5777C-Clock source to the PIT Timer

yashkumar — Sun, 27 May 2018 07:33:59 GMT

Hi,

Thanks for this example,could you help me about the clock source to the PIT Timer .

what is the out put clock friquency of phi and phi1 in above example.

please help on .

Thanks!

PetrS — Mon, 28 May 2018 10:54:10 GMT

Hi,

clocks are configured in the startup, see init.s file.

PLL0 is configured to 192MHz (40MHz XOSC reference) and PLL1 to 264MHz (48MHz PLL0 PHI1 output reference).

PIT is running from PER_CLK; as the setting used is SIU_SYSDIV[PERCLKSEL]=1 and SIU_SYSDIV[PERDIV]=0, the

PIT clock is PLL0/2 = 96MHz.

BR, Petr

yashkumar — Tue, 29 May 2018 07:49:38 GMT

Hi Petr,

Yes, i have gone through startup . And thanks alot for this help.